From 7c395ad06f0eaaffa638da58899b51daba2041a4 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Thu, 28 Sep 2006 20:48:45 +0000 Subject: [PATCH] Shift amounts are always 32-bits, even in 64-bit mode. This fixes CodeGen/PowerPC/2006-09-28-shift_64.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30652 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCInstr64Bit.td | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index ff0ebfab1fc..d822c66ead6 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -168,15 +168,15 @@ def CMPDI : DForm_5_ext<11, (ops CRRC:$crD, G8RC:$rA, s16imm:$imm), def CMPLDI : DForm_6_ext<10, (ops CRRC:$dst, G8RC:$src1, u16imm:$src2), "cmpldi $dst, $src1, $src2", IntCompare>, isPPC64; -def SLD : XForm_6<31, 27, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB), +def SLD : XForm_6<31, 27, (ops G8RC:$rA, G8RC:$rS, GPRC:$rB), "sld $rA, $rS, $rB", IntRotateD, - [(set G8RC:$rA, (shl G8RC:$rS, G8RC:$rB))]>, isPPC64; -def SRD : XForm_6<31, 539, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB), + [(set G8RC:$rA, (shl G8RC:$rS, GPRC:$rB))]>, isPPC64; +def SRD : XForm_6<31, 539, (ops G8RC:$rA, G8RC:$rS, GPRC:$rB), "srd $rA, $rS, $rB", IntRotateD, - [(set G8RC:$rA, (srl G8RC:$rS, G8RC:$rB))]>, isPPC64; -def SRAD : XForm_6<31, 794, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB), + [(set G8RC:$rA, (srl G8RC:$rS, GPRC:$rB))]>, isPPC64; +def SRAD : XForm_6<31, 794, (ops G8RC:$rA, G8RC:$rS, GPRC:$rB), "srad $rA, $rS, $rB", IntRotateD, - [(set G8RC:$rA, (sra G8RC:$rS, G8RC:$rB))]>, isPPC64; + [(set G8RC:$rA, (sra G8RC:$rS, GPRC:$rB))]>, isPPC64; def EXTSW : XForm_11<31, 986, (ops G8RC:$rA, G8RC:$rS), "extsw $rA, $rS", IntGeneral, [(set G8RC:$rA, (sext_inreg G8RC:$rS, i32))]>, isPPC64;