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Don't use the ISD::NodeType enum for SDNode opcodes, as CodeGen

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uses several kinds of opcode values which are not declared within
that enum. This fixes PR5946.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92794 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2010-01-05 22:26:32 +00:00
parent bf170d4c2f
commit 7c3ecb6838
3 changed files with 25 additions and 25 deletions
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24
include/llvm/CodeGen/FastISel.h
View File

@ -139,7 +139,7 @@ protected:
/// be emitted.
virtual unsigned FastEmit_(MVT VT,
MVT RetVT,
ISD::NodeType Opcode);
unsigned Opcode);
/// FastEmit_r - This method is called by target-independent code
/// to request that an instruction with the given type, opcode, and
@ -147,7 +147,7 @@ protected:
///
virtual unsigned FastEmit_r(MVT VT,
MVT RetVT,
ISD::NodeType Opcode, unsigned Op0);
unsigned Opcode, unsigned Op0);
/// FastEmit_rr - This method is called by target-independent code
/// to request that an instruction with the given type, opcode, and
@ -155,7 +155,7 @@ protected:
///
virtual unsigned FastEmit_rr(MVT VT,
MVT RetVT,
ISD::NodeType Opcode,
unsigned Opcode,
unsigned Op0, unsigned Op1);
/// FastEmit_ri - This method is called by target-independent code
@ -164,7 +164,7 @@ protected:
///
virtual unsigned FastEmit_ri(MVT VT,
MVT RetVT,
ISD::NodeType Opcode,
unsigned Opcode,
unsigned Op0, uint64_t Imm);
/// FastEmit_rf - This method is called by target-independent code
@ -173,7 +173,7 @@ protected:
///
virtual unsigned FastEmit_rf(MVT VT,
MVT RetVT,
ISD::NodeType Opcode,
unsigned Opcode,
unsigned Op0, ConstantFP *FPImm);
/// FastEmit_rri - This method is called by target-independent code
@ -182,7 +182,7 @@ protected:
///
virtual unsigned FastEmit_rri(MVT VT,
MVT RetVT,
ISD::NodeType Opcode,
unsigned Opcode,
unsigned Op0, unsigned Op1, uint64_t Imm);
/// FastEmit_ri_ - This method is a wrapper of FastEmit_ri. It first tries
@ -190,7 +190,7 @@ protected:
/// If that fails, it materializes the immediate into a register and try
/// FastEmit_rr instead.
unsigned FastEmit_ri_(MVT VT,
ISD::NodeType Opcode,
unsigned Opcode,
unsigned Op0, uint64_t Imm,
MVT ImmType);
@ -199,7 +199,7 @@ protected:
/// If that fails, it materializes the immediate into a register and try
/// FastEmit_rr instead.
unsigned FastEmit_rf_(MVT VT,
ISD::NodeType Opcode,
unsigned Opcode,
unsigned Op0, ConstantFP *FPImm,
MVT ImmType);
@ -208,7 +208,7 @@ protected:
/// immediate operand be emitted.
virtual unsigned FastEmit_i(MVT VT,
MVT RetVT,
ISD::NodeType Opcode,
unsigned Opcode,
uint64_t Imm);
/// FastEmit_f - This method is called by target-independent code
@ -216,7 +216,7 @@ protected:
/// floating-point immediate operand be emitted.
virtual unsigned FastEmit_f(MVT VT,
MVT RetVT,
ISD::NodeType Opcode,
unsigned Opcode,
ConstantFP *FPImm);
/// FastEmitInst_ - Emit a MachineInstr with no operands and a
@ -298,7 +298,7 @@ protected:
}
private:
bool SelectBinaryOp(User *I, ISD::NodeType ISDOpcode);
bool SelectBinaryOp(User *I, unsigned ISDOpcode);
bool SelectFNeg(User *I);
@ -308,7 +308,7 @@ private:
bool SelectBitCast(User *I);
bool SelectCast(User *I, ISD::NodeType Opcode);
bool SelectCast(User *I, unsigned Opcode);
};
}

24
lib/CodeGen/SelectionDAG/FastISel.cpp
View File

@ -188,7 +188,7 @@ unsigned FastISel::getRegForGEPIndex(Value *Idx) {
/// SelectBinaryOp - Select and emit code for a binary operator instruction,
/// which has an opcode which directly corresponds to the given ISD opcode.
///
bool FastISel::SelectBinaryOp(User *I, ISD::NodeType ISDOpcode) {
bool FastISel::SelectBinaryOp(User *I, unsigned ISDOpcode) {
EVT VT = EVT::getEVT(I->getType(), /*HandleUnknown=*/true);
if (VT == MVT::Other || !VT.isSimple())
// Unhandled type. Halt "fast" selection and bail.
@ -418,7 +418,7 @@ bool FastISel::SelectCall(User *I) {
return false;
}
bool FastISel::SelectCast(User *I, ISD::NodeType Opcode) {
bool FastISel::SelectCast(User *I, unsigned Opcode) {
EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType());
EVT DstVT = TLI.getValueType(I->getType());
@ -736,44 +736,44 @@ FastISel::FastISel(MachineFunction &mf,
FastISel::~FastISel() {}
unsigned FastISel::FastEmit_(MVT, MVT,
ISD::NodeType) {
unsigned) {
return 0;
}
unsigned FastISel::FastEmit_r(MVT, MVT,
ISD::NodeType, unsigned /*Op0*/) {
unsigned, unsigned /*Op0*/) {
return 0;
}
unsigned FastISel::FastEmit_rr(MVT, MVT,
ISD::NodeType, unsigned /*Op0*/,
unsigned, unsigned /*Op0*/,
unsigned /*Op0*/) {
return 0;
}
unsigned FastISel::FastEmit_i(MVT, MVT, ISD::NodeType, uint64_t /*Imm*/) {
unsigned FastISel::FastEmit_i(MVT, MVT, unsigned, uint64_t /*Imm*/) {
return 0;
}
unsigned FastISel::FastEmit_f(MVT, MVT,
ISD::NodeType, ConstantFP * /*FPImm*/) {
unsigned, ConstantFP * /*FPImm*/) {
return 0;
}
unsigned FastISel::FastEmit_ri(MVT, MVT,
ISD::NodeType, unsigned /*Op0*/,
unsigned, unsigned /*Op0*/,
uint64_t /*Imm*/) {
return 0;
}
unsigned FastISel::FastEmit_rf(MVT, MVT,
ISD::NodeType, unsigned /*Op0*/,
unsigned, unsigned /*Op0*/,
ConstantFP * /*FPImm*/) {
return 0;
}
unsigned FastISel::FastEmit_rri(MVT, MVT,
ISD::NodeType,
unsigned,
unsigned /*Op0*/, unsigned /*Op1*/,
uint64_t /*Imm*/) {
return 0;
@ -783,7 +783,7 @@ unsigned FastISel::FastEmit_rri(MVT, MVT,
/// to emit an instruction with an immediate operand using FastEmit_ri.
/// If that fails, it materializes the immediate into a register and try
/// FastEmit_rr instead.
unsigned FastISel::FastEmit_ri_(MVT VT, ISD::NodeType Opcode,
unsigned FastISel::FastEmit_ri_(MVT VT, unsigned Opcode,
unsigned Op0, uint64_t Imm,
MVT ImmType) {
// First check if immediate type is legal. If not, we can't use the ri form.
@ -800,7 +800,7 @@ unsigned FastISel::FastEmit_ri_(MVT VT, ISD::NodeType Opcode,
/// to emit an instruction with a floating-point immediate operand using
/// FastEmit_rf. If that fails, it materializes the immediate into a register
/// and try FastEmit_rr instead.
unsigned FastISel::FastEmit_rf_(MVT VT, ISD::NodeType Opcode,
unsigned FastISel::FastEmit_rf_(MVT VT, unsigned Opcode,
unsigned Op0, ConstantFP *FPImm,
MVT ImmType) {
// First check if immediate type is legal. If not, we can't use the rf form.

2
utils/TableGen/FastISelEmitter.cpp
View File

@ -586,7 +586,7 @@ void FastISelMap::PrintFunctionDefinitions(raw_ostream &OS) {
// on opcode and type.
OS << "unsigned FastEmit_";
Operands.PrintManglingSuffix(OS);
OS << "(MVT VT, MVT RetVT, ISD::NodeType Opcode";
OS << "(MVT VT, MVT RetVT, unsigned Opcode";
if (!Operands.empty())
OS << ", ";
Operands.PrintParameters(OS);