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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -78,11 +78,11 @@ cond_true1369.preheader: ; preds = %cond_true1254
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ret void
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bb1567: ; preds = %cond_true1254
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%tmp1580 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 3) ; <i64> [#uses=1]
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%tmp1591 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 4) ; <i64> [#uses=1]
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%tmp1580 = load i64, i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 3) ; <i64> [#uses=1]
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%tmp1591 = load i64, i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 4) ; <i64> [#uses=1]
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%tmp1572 = tail call fastcc i32 @FirstOne( ) ; <i32> [#uses=5]
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%tmp1582 = getelementptr [64 x i32], [64 x i32]* @bishop_shift_rl45, i32 0, i32 %tmp1572 ; <i32*> [#uses=1]
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%tmp1583 = load i32* %tmp1582 ; <i32> [#uses=1]
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%tmp1583 = load i32, i32* %tmp1582 ; <i32> [#uses=1]
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%tmp1583.upgrd.1 = trunc i32 %tmp1583 to i8 ; <i8> [#uses=1]
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%shift.upgrd.2 = zext i8 %tmp1583.upgrd.1 to i64 ; <i64> [#uses=1]
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%tmp1584 = lshr i64 %tmp1580, %shift.upgrd.2 ; <i64> [#uses=1]
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@@ -90,9 +90,9 @@ bb1567: ; preds = %cond_true1254
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%tmp1585 = and i32 %tmp1584.upgrd.3, 255 ; <i32> [#uses=1]
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%gep.upgrd.4 = zext i32 %tmp1585 to i64 ; <i64> [#uses=1]
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%tmp1587 = getelementptr [64 x [256 x i32]], [64 x [256 x i32]]* @bishop_mobility_rl45, i32 0, i32 %tmp1572, i64 %gep.upgrd.4 ; <i32*> [#uses=1]
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%tmp1588 = load i32* %tmp1587 ; <i32> [#uses=1]
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%tmp1588 = load i32, i32* %tmp1587 ; <i32> [#uses=1]
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%tmp1593 = getelementptr [64 x i32], [64 x i32]* @bishop_shift_rr45, i32 0, i32 %tmp1572 ; <i32*> [#uses=1]
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%tmp1594 = load i32* %tmp1593 ; <i32> [#uses=1]
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%tmp1594 = load i32, i32* %tmp1593 ; <i32> [#uses=1]
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%tmp1594.upgrd.5 = trunc i32 %tmp1594 to i8 ; <i8> [#uses=1]
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%shift.upgrd.6 = zext i8 %tmp1594.upgrd.5 to i64 ; <i64> [#uses=1]
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%tmp1595 = lshr i64 %tmp1591, %shift.upgrd.6 ; <i64> [#uses=1]
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@@ -100,11 +100,11 @@ bb1567: ; preds = %cond_true1254
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%tmp1596 = and i32 %tmp1595.upgrd.7, 255 ; <i32> [#uses=1]
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%gep.upgrd.8 = zext i32 %tmp1596 to i64 ; <i64> [#uses=1]
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%tmp1598 = getelementptr [64 x [256 x i32]], [64 x [256 x i32]]* @bishop_mobility_rr45, i32 0, i32 %tmp1572, i64 %gep.upgrd.8 ; <i32*> [#uses=1]
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%tmp1599 = load i32* %tmp1598 ; <i32> [#uses=1]
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%tmp1599 = load i32, i32* %tmp1598 ; <i32> [#uses=1]
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%tmp1600.neg = sub i32 0, %tmp1588 ; <i32> [#uses=1]
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%tmp1602 = sub i32 %tmp1600.neg, %tmp1599 ; <i32> [#uses=1]
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%tmp1604 = getelementptr [64 x i8], [64 x i8]* @black_outpost, i32 0, i32 %tmp1572 ; <i8*> [#uses=1]
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%tmp1605 = load i8* %tmp1604 ; <i8> [#uses=1]
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%tmp1605 = load i8, i8* %tmp1604 ; <i8> [#uses=1]
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%tmp1606 = icmp eq i8 %tmp1605, 0 ; <i1> [#uses=1]
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br i1 %tmp1606, label %cond_next1637, label %cond_true1607
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