Sort the register list based on the *actual* register numbers rather than the

enum values we give to them. <rdar://problem/8823730>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123321 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2011-01-12 21:20:59 +00:00
parent 85bbd576ea
commit 7caebff83d
2 changed files with 13 additions and 5 deletions

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@ -583,15 +583,15 @@ ParseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
SmallVectorImpl<std::pair<unsigned, SMLoc> >::const_iterator
RI = Registers.begin(), RE = Registers.end();
DenseMap<unsigned, bool> RegMap;
RegMap[RI->first] = true;
unsigned HighRegNum = RI->first;
unsigned HighRegNum = getARMRegisterNumbering(RI->first);
bool EmittedWarning = false;
DenseMap<unsigned, bool> RegMap;
RegMap[HighRegNum] = true;
for (++RI; RI != RE; ++RI) {
const std::pair<unsigned, SMLoc> &RegInfo = *RI;
unsigned Reg = RegInfo.first;
unsigned Reg = getARMRegisterNumbering(RegInfo.first);
if (RegMap[Reg]) {
Error(RegInfo.second, "register duplicated in register list");

8
test/MC/ARM/reg-list.s Normal file
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@ -0,0 +1,8 @@
@ RUN: llvm-mc -triple thumb-apple-darwin10 -show-encoding < %s 2> %t | FileCheck %s
@ RUN: FileCheck --check-prefix=CHECK-WARNINGS < %t %s
push {r7, lr}
@ CHECK-WARNINGS: register not in ascending order in register list
push {lr, r7}
@ CHECK: push {lr, r7}