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synced 2025-02-20 14:29:27 +00:00
Change some asm shift opcode strings to lowercase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97567 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1614,14 +1614,14 @@ def USADA8 : AI<(outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
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// Signed/Unsigned saturate -- for disassembly only
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def SSATlsl : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, i32imm:$shamt),
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DPFrm, NoItinerary, "ssat", "\t$dst, $bit_pos, $a, LSL $shamt",
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DPFrm, NoItinerary, "ssat", "\t$dst, $bit_pos, $a, lsl $shamt",
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[/* For disassembly only; pattern left blank */]> {
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let Inst{27-21} = 0b0110101;
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let Inst{6-4} = 0b001;
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}
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def SSATasr : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, i32imm:$shamt),
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DPFrm, NoItinerary, "ssat", "\t$dst, $bit_pos, $a, ASR $shamt",
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DPFrm, NoItinerary, "ssat", "\t$dst, $bit_pos, $a, asr $shamt",
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[/* For disassembly only; pattern left blank */]> {
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let Inst{27-21} = 0b0110101;
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let Inst{6-4} = 0b101;
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@ -1635,14 +1635,14 @@ def SSAT16 : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a), DPFrm,
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}
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def USATlsl : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, i32imm:$shamt),
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DPFrm, NoItinerary, "usat", "\t$dst, $bit_pos, $a, LSL $shamt",
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DPFrm, NoItinerary, "usat", "\t$dst, $bit_pos, $a, lsl $shamt",
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[/* For disassembly only; pattern left blank */]> {
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let Inst{27-21} = 0b0110111;
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let Inst{6-4} = 0b001;
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}
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def USATasr : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, i32imm:$shamt),
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DPFrm, NoItinerary, "usat", "\t$dst, $bit_pos, $a, ASR $shamt",
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DPFrm, NoItinerary, "usat", "\t$dst, $bit_pos, $a, asr $shamt",
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[/* For disassembly only; pattern left blank */]> {
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let Inst{27-21} = 0b0110111;
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let Inst{6-4} = 0b101;
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@ -2054,7 +2054,7 @@ def REVSH : AMiscA1I<0b01101111, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
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def PKHBT : AMiscA1I<0b01101000, (outs GPR:$dst),
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(ins GPR:$src1, GPR:$src2, i32imm:$shamt),
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IIC_iALUsi, "pkhbt", "\t$dst, $src1, $src2, LSL $shamt",
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IIC_iALUsi, "pkhbt", "\t$dst, $src1, $src2, lsl $shamt",
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[(set GPR:$dst, (or (and GPR:$src1, 0xFFFF),
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(and (shl GPR:$src2, (i32 imm:$shamt)),
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0xFFFF0000)))]>,
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@ -2071,7 +2071,7 @@ def : ARMV6Pat<(or (and GPR:$src1, 0xFFFF), (shl GPR:$src2, imm16_31:$shamt)),
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def PKHTB : AMiscA1I<0b01101000, (outs GPR:$dst),
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(ins GPR:$src1, GPR:$src2, i32imm:$shamt),
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IIC_iALUsi, "pkhtb", "\t$dst, $src1, $src2, ASR $shamt",
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IIC_iALUsi, "pkhtb", "\t$dst, $src1, $src2, asr $shamt",
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[(set GPR:$dst, (or (and GPR:$src1, 0xFFFF0000),
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(and (sra GPR:$src2, imm16_31:$shamt),
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0xFFFF)))]>, Requires<[IsARM, HasV6]> {
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