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eliminate the ARMFunctionInfo::Align member, using

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MachineFunction::Alignment instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94701 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-01-27 23:37:36 +00:00
parent aeb7be3435
commit 7d7dab0278
3 changed files with 6 additions and 19 deletions
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10
lib/Target/ARM/ARMConstantIslandPass.cpp
View File

@ -302,9 +302,9 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &MF) {
// Thumb1 functions containing constant pools get 4-byte alignment.
// This is so we can keep exact track of where the alignment padding goes.
// Set default. Thumb1 function is 2-byte aligned, ARM and Thumb2 are 4-byte
// aligned.
AFI->setAlign(isThumb1 ? 1U : 2U);
// ARM and Thumb2 functions need to be 4-byte aligned.
if (!isThumb1)
MF.EnsureAlignment(2); // 2 = log2(4)
// Perform the initial placement of the constant pool entries. To start with,
// we put them all at the end of the function.
@ -312,7 +312,7 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &MF) {
if (!MCP.isEmpty()) {
DoInitialPlacement(MF, CPEMIs);
if (isThumb1)
AFI->setAlign(2U);
MF.EnsureAlignment(2); // 2 = log2(4)
}
/// The next UID to take is the first unused one.
@ -506,7 +506,7 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &MF,
case ARM::tBR_JTr:
// A Thumb1 table jump may involve padding; for the offsets to
// be right, functions containing these must be 4-byte aligned.
AFI->setAlign(2U);
MF.EnsureAlignment(2U);
if ((Offset+MBBSize)%4 != 0 || HasInlineAsm)
// FIXME: Add a pseudo ALIGN instruction instead.
MBBSize += 2; // padding

10
lib/Target/ARM/ARMMachineFunctionInfo.h
View File

@ -35,11 +35,6 @@ class ARMFunctionInfo : public MachineFunctionInfo {
/// 'isThumb'.
bool hasThumb2;
/// Align - required alignment. ARM functions and Thumb functions with
/// constant pools require 4-byte alignment; other Thumb functions
/// require only 2-byte alignment.
unsigned Align;
/// VarArgsRegSaveSize - Size of the register save area for vararg functions.
///
unsigned VarArgsRegSaveSize;
@ -94,7 +89,6 @@ public:
ARMFunctionInfo() :
isThumb(false),
hasThumb2(false),
Align(2U),
VarArgsRegSaveSize(0), HasStackFrame(false),
LRSpilledForFarJump(false),
FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
@ -105,7 +99,6 @@ public:
explicit ARMFunctionInfo(MachineFunction &MF) :
isThumb(MF.getTarget().getSubtarget<ARMSubtarget>().isThumb()),
hasThumb2(MF.getTarget().getSubtarget<ARMSubtarget>().hasThumb2()),
Align(isThumb ? 1U : 2U),
VarArgsRegSaveSize(0), HasStackFrame(false),
LRSpilledForFarJump(false),
FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
@ -118,9 +111,6 @@ public:
bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; }
bool isThumb2Function() const { return isThumb && hasThumb2; }
unsigned getAlign() const { return Align; }
void setAlign(unsigned a) { Align = a; }
unsigned getVarArgsRegSaveSize() const { return VarArgsRegSaveSize; }
void setVarArgsRegSaveSize(unsigned s) { VarArgsRegSaveSize = s; }

5
lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
View File

@ -280,16 +280,13 @@ bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
printVisibility(CurrentFnSym, F->getVisibility());
unsigned FnAlign = 1 << MF.getAlignment(); // MF alignment is log2.
EmitAlignment(1 << MF.getAlignment(), F);
if (AFI->isThumbFunction()) {
EmitAlignment(FnAlign, F, AFI->getAlign());
O << "\t.code\t16\n";
O << "\t.thumb_func";
if (Subtarget->isTargetDarwin())
O << "\t" << *CurrentFnSym;
O << "\n";
} else {
EmitAlignment(FnAlign, F);
}
O << *CurrentFnSym << ":\n";