diff --git a/include/llvm/PassManagers.h b/include/llvm/PassManagers.h index ae5b79a28f7..1c4c741d434 100644 --- a/include/llvm/PassManagers.h +++ b/include/llvm/PassManagers.h @@ -451,9 +451,9 @@ public: } }; -} - extern void StartPassTimer(llvm::Pass *); extern void StopPassTimer(llvm::Pass *); +} + #endif diff --git a/lib/Analysis/IPA/Andersens.cpp b/lib/Analysis/IPA/Andersens.cpp index 3c07d24bef4..835c1ea1ee8 100644 --- a/lib/Analysis/IPA/Andersens.cpp +++ b/lib/Analysis/IPA/Andersens.cpp @@ -1396,7 +1396,7 @@ bool Andersens::Node::intersectsIgnoring(Node *N, unsigned Ignoring) const { return Result; } -void dumpToDOUT(SparseBitVector<> *bitmap) { +static void dumpToDOUT(SparseBitVector<> *bitmap) { #ifndef NDEBUG raw_os_ostream OS(*DOUT); dump(*bitmap, OS); diff --git a/lib/Analysis/ValueTracking.cpp b/lib/Analysis/ValueTracking.cpp index 0ed0bbdc332..dbaadd824a1 100644 --- a/lib/Analysis/ValueTracking.cpp +++ b/lib/Analysis/ValueTracking.cpp @@ -817,11 +817,11 @@ bool llvm::CannotBeNegativeZero(const Value *V, unsigned Depth) { // indices from Idxs that should be left out when inserting into the resulting // struct. To is the result struct built so far, new insertvalue instructions // build on that. -Value *BuildSubAggregate(Value *From, Value* To, const Type *IndexedType, - SmallVector &Idxs, - unsigned IdxSkip, - LLVMContext &Context, - Instruction *InsertBefore) { +static Value *BuildSubAggregate(Value *From, Value* To, const Type *IndexedType, + SmallVector &Idxs, + unsigned IdxSkip, + LLVMContext &Context, + Instruction *InsertBefore) { const llvm::StructType *STy = llvm::dyn_cast(IndexedType); if (STy) { // Save the original To argument so we can modify it @@ -877,9 +877,9 @@ Value *BuildSubAggregate(Value *From, Value* To, const Type *IndexedType, // insertvalue instruction somewhere). // // All inserted insertvalue instructions are inserted before InsertBefore -Value *BuildSubAggregate(Value *From, const unsigned *idx_begin, - const unsigned *idx_end, LLVMContext &Context, - Instruction *InsertBefore) { +static Value *BuildSubAggregate(Value *From, const unsigned *idx_begin, + const unsigned *idx_end, LLVMContext &Context, + Instruction *InsertBefore) { assert(InsertBefore && "Must have someplace to insert!"); const Type *IndexedType = ExtractValueInst::getIndexedType(From->getType(), idx_begin, diff --git a/lib/CodeGen/VirtRegRewriter.cpp b/lib/CodeGen/VirtRegRewriter.cpp index 460b508a804..b34d43a1f5d 100644 --- a/lib/CodeGen/VirtRegRewriter.cpp +++ b/lib/CodeGen/VirtRegRewriter.cpp @@ -48,13 +48,14 @@ RewriterOpt("rewriter", clEnumValEnd), cl::init(local)); -cl::opt +static cl::opt ScheduleSpills("schedule-spills", cl::desc("Schedule spill code"), cl::init(false)); VirtRegRewriter::~VirtRegRewriter() {} +namespace { /// This class is intended for use with the new spilling framework only. It /// rewrites vreg def/uses to use the assigned preg, but does not insert any @@ -101,8 +102,12 @@ struct VISIBILITY_HIDDEN TrivialRewriter : public VirtRegRewriter { }; +} + // ************************************************************************ // +namespace { + /// AvailableSpills - As the local rewriter is scanning and rewriting an MBB /// from top down, keep track of which spill slots or remat are available in /// each register. @@ -225,6 +230,8 @@ public: std::vector &KillOps); }; +} + // ************************************************************************ // // Given a location where a reload of a spilled register or a remat of @@ -296,7 +303,9 @@ stop:; return NewInsertLoc; } - + +namespace { + // ReusedOp - For each reused operand, we keep track of a bit of information, // in case we need to rollback upon processing a new operand. See comments // below. @@ -396,6 +405,7 @@ public: } }; +} // ****************** // // Utility Functions // @@ -962,6 +972,8 @@ namespace { // Local Spiller Implementation // // ***************************** // +namespace { + class VISIBILITY_HIDDEN LocalRewriter : public VirtRegRewriter { MachineRegisterInfo *RegInfo; const TargetRegisterInfo *TRI; @@ -2320,6 +2332,8 @@ private: }; +} + llvm::VirtRegRewriter* llvm::createVirtRegRewriter() { switch (RewriterOpt) { default: llvm_unreachable("Unreachable!"); diff --git a/lib/ExecutionEngine/JIT/Intercept.cpp b/lib/ExecutionEngine/JIT/Intercept.cpp index 0dde845559e..33143394f4c 100644 --- a/lib/ExecutionEngine/JIT/Intercept.cpp +++ b/lib/ExecutionEngine/JIT/Intercept.cpp @@ -57,6 +57,7 @@ static void runAtExitHandlers() { * linking with libc_nonshared.a and -Wl,--export-dynamic doesn't make 'stat' * available as an exported symbol, so we have to add it explicitly. */ +namespace { class StatSymbols { public: StatSymbols() { @@ -73,6 +74,7 @@ public: sys::DynamicLibrary::AddSymbol("mknod", (void*)(intptr_t)mknod); } }; +} static StatSymbols initStatSymbols; #endif // __linux__ diff --git a/lib/System/Unix/Alarm.inc b/lib/System/Unix/Alarm.inc index 28ff1b8a636..fb42b6c65da 100644 --- a/lib/System/Unix/Alarm.inc +++ b/lib/System/Unix/Alarm.inc @@ -67,6 +67,6 @@ int sys::AlarmStatus() { return 0; } -void Sleep(unsigned n) { +void sys::Sleep(unsigned n) { ::sleep(n); } diff --git a/lib/Target/ARM/Thumb2ITBlockPass.cpp b/lib/Target/ARM/Thumb2ITBlockPass.cpp index 3ff31aa28bf..d41e6ee1042 100644 --- a/lib/Target/ARM/Thumb2ITBlockPass.cpp +++ b/lib/Target/ARM/Thumb2ITBlockPass.cpp @@ -40,8 +40,8 @@ namespace { char Thumb2ITBlockPass::ID = 0; } -ARMCC::CondCodes getPredicate(const MachineInstr *MI, - const Thumb2InstrInfo *TII) { +static ARMCC::CondCodes getPredicate(const MachineInstr *MI, + const Thumb2InstrInfo *TII) { unsigned Opc = MI->getOpcode(); if (Opc == ARM::tBcc || Opc == ARM::t2Bcc) return ARMCC::AL; diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index d9299b4bbcf..d4110788542 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -898,7 +898,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { } //! Generate the address of a constant pool entry. -SDValue +static SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { MVT PtrVT = Op.getValueType(); ConstantPoolSDNode *CP = cast(Op); @@ -1550,7 +1550,7 @@ SDValue SPU::get_v2i64_imm(SDNode *N, SelectionDAG &DAG) { } //! Lower a BUILD_VECTOR instruction creatively: -SDValue +static SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) { MVT VT = Op.getValueType(); MVT EltVT = VT.getVectorElementType(); diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp index e3e45f63cda..4f6a79ee535 100644 --- a/lib/Target/Sparc/SparcISelLowering.cpp +++ b/lib/Target/Sparc/SparcISelLowering.cpp @@ -549,6 +549,8 @@ static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) { } } +namespace { + class TargetLoweringObjectFileSparc : public TargetLoweringObjectFileELF { public: void getSectionFlagsAsString(SectionKind Kind, @@ -571,6 +573,7 @@ public: } }; +} SparcTargetLowering::SparcTargetLowering(TargetMachine &TM) : TargetLowering(TM, new TargetLoweringObjectFileSparc()) { diff --git a/lib/Transforms/IPO/StripSymbols.cpp b/lib/Transforms/IPO/StripSymbols.cpp index b498211b3fd..316b0d79750 100644 --- a/lib/Transforms/IPO/StripSymbols.cpp +++ b/lib/Transforms/IPO/StripSymbols.cpp @@ -172,7 +172,7 @@ static void findUsedValues(GlobalVariable *LLVMUsed, } /// StripSymbolNames - Strip symbol names. -bool StripSymbolNames(Module &M, bool PreserveDbgInfo) { +static bool StripSymbolNames(Module &M, bool PreserveDbgInfo) { SmallPtrSet llvmUsedValues; findUsedValues(M.getGlobalVariable("llvm.used"), llvmUsedValues); @@ -201,7 +201,7 @@ bool StripSymbolNames(Module &M, bool PreserveDbgInfo) { // StripDebugInfo - Strip debug info in the module if it exists. // To do this, we remove llvm.dbg.func.start, llvm.dbg.stoppoint, and // llvm.dbg.region.end calls, and any globals they point to if now dead. -bool StripDebugInfo(Module &M) { +static bool StripDebugInfo(Module &M) { SmallPtrSet llvmUsedValues; findUsedValues(M.getGlobalVariable("llvm.used"), llvmUsedValues); diff --git a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp index 3cfaed6a663..6a56a8d8245 100644 --- a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp +++ b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp @@ -760,6 +760,7 @@ void PromoteMem2Reg::RewriteSingleStoreAlloca(AllocaInst *AI, } } +namespace { /// StoreIndexSearchPredicate - This is a helper predicate used to search by the /// first element of a pair. @@ -770,6 +771,8 @@ struct StoreIndexSearchPredicate { } }; +} + /// PromoteSingleBlockAlloca - Many allocas are only used within a single basic /// block. If this is the case, avoid traversing the CFG and inserting a lot of /// potentially useless PHI nodes by just performing a single linear pass over diff --git a/lib/VMCore/PassManager.cpp b/lib/VMCore/PassManager.cpp index 7c6792f4bf4..8c427849e71 100644 --- a/lib/VMCore/PassManager.cpp +++ b/lib/VMCore/PassManager.cpp @@ -1582,13 +1582,13 @@ void TimingInfo::createTheTimeInfo() { } /// If TimingInfo is enabled then start pass timer. -void StartPassTimer(Pass *P) { +void llvm::StartPassTimer(Pass *P) { if (TheTimeInfo) TheTimeInfo->passStarted(P); } /// If TimingInfo is enabled then stop pass timer. -void StopPassTimer(Pass *P) { +void llvm::StopPassTimer(Pass *P) { if (TheTimeInfo) TheTimeInfo->passEnded(P); }