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Fix a bug that caused us to crash on povray. We weren't emitting an FP_REG_KILL into a block that had a successor with a FP PHI node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19502 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -326,55 +326,7 @@ namespace {
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/// InstructionSelectBasicBlock - This callback is invoked by
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/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
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virtual void InstructionSelectBasicBlock(SelectionDAG &DAG) {
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// While we're doing this, keep track of whether we see any FP code for
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// FP_REG_KILL insertion.
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ContainsFPCode = false;
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// Scan the PHI nodes that already are inserted into this basic block. If
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// any of them is a PHI of a floating point value, we need to insert an
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// FP_REG_KILL.
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SSARegMap *RegMap = BB->getParent()->getSSARegMap();
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for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end();
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I != E; ++I) {
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assert(I->getOpcode() == X86::PHI &&
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"Isn't just PHI nodes?");
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if (RegMap->getRegClass(I->getOperand(0).getReg()) ==
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X86::RFPRegisterClass) {
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ContainsFPCode = true;
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break;
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}
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}
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// Compute the RegPressureMap, which is an approximation for the number of
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// registers required to compute each node.
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ComputeRegPressure(DAG.getRoot());
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// Codegen the basic block.
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Select(DAG.getRoot());
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// Insert FP_REG_KILL instructions into basic blocks that need them. This
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// only occurs due to the floating point stackifier not being aggressive
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// enough to handle arbitrary global stackification.
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//
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// Currently we insert an FP_REG_KILL instruction into each block that
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// uses or defines a floating point virtual register.
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//
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// When the global register allocators (like linear scan) finally update
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// live variable analysis, we can keep floating point values in registers
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// across basic blocks. This will be a huge win, but we are waiting on
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// the global allocators before we can do this.
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//
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if (ContainsFPCode && BB->succ_size()) {
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BuildMI(*BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0);
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++NumFPKill;
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}
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// Clear state used for selection.
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ExprMap.clear();
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LoweredTokens.clear();
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RegPressureMap.clear();
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}
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virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
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bool isFoldableLoad(SDOperand Op);
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void EmitFoldedLoad(SDOperand Op, X86AddressMode &AM);
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@ -390,6 +342,72 @@ namespace {
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};
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}
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/// InstructionSelectBasicBlock - This callback is invoked by SelectionDAGISel
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/// when it has created a SelectionDAG for us to codegen.
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void ISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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// While we're doing this, keep track of whether we see any FP code for
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// FP_REG_KILL insertion.
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ContainsFPCode = false;
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// Scan the PHI nodes that already are inserted into this basic block. If any
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// of them is a PHI of a floating point value, we need to insert an
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// FP_REG_KILL.
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SSARegMap *RegMap = BB->getParent()->getSSARegMap();
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for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end();
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I != E; ++I) {
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assert(I->getOpcode() == X86::PHI &&
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"Isn't just PHI nodes?");
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if (RegMap->getRegClass(I->getOperand(0).getReg()) ==
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X86::RFPRegisterClass) {
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ContainsFPCode = true;
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break;
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}
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}
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// Compute the RegPressureMap, which is an approximation for the number of
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// registers required to compute each node.
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ComputeRegPressure(DAG.getRoot());
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// Codegen the basic block.
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Select(DAG.getRoot());
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// Finally, look at all of the successors of this block. If any contain a PHI
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// node of FP type, we need to insert an FP_REG_KILL in this block.
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for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
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E = BB->succ_end(); SI != E && !ContainsFPCode; ++SI)
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for (MachineBasicBlock::iterator I = (*SI)->begin(), E = (*SI)->end();
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I != E && I->getOpcode() == X86::PHI; ++I) {
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if (RegMap->getRegClass(I->getOperand(0).getReg()) ==
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X86::RFPRegisterClass) {
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ContainsFPCode = true;
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break;
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}
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}
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// Insert FP_REG_KILL instructions into basic blocks that need them. This
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// only occurs due to the floating point stackifier not being aggressive
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// enough to handle arbitrary global stackification.
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//
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// Currently we insert an FP_REG_KILL instruction into each block that uses or
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// defines a floating point virtual register.
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//
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// When the global register allocators (like linear scan) finally update live
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// variable analysis, we can keep floating point values in registers across
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// basic blocks. This will be a huge win, but we are waiting on the global
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// allocators before we can do this.
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//
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if (ContainsFPCode && BB->succ_size()) {
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BuildMI(*BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0);
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++NumFPKill;
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}
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// Clear state used for selection.
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ExprMap.clear();
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LoweredTokens.clear();
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RegPressureMap.clear();
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}
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// ComputeRegPressure - Compute the RegPressureMap, which is an approximation
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// for the number of registers required to compute each node. This is basically
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// computing a generalized form of the Sethi-Ullman number for each node.
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@ -1222,6 +1240,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
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switch (SrcTy) {
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case MVT::i64:
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assert(0 && "Cast ulong to FP not implemented yet!");
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// FIXME: this won't work for cast [u]long to FP
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addFrameReference(BuildMI(BB, X86::MOV32mr, 5),
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FrameIdx).addReg(Tmp1);
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@ -1357,6 +1376,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
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assert(0 && "Unknown integer type!");
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case MVT::i64:
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// FIXME: this isn't gunna work.
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assert(0 && "Cast FP to long not implemented yet!");
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addFrameReference(BuildMI(BB, X86::MOV32rm, 4, Result), FrameIdx);
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addFrameReference(BuildMI(BB, X86::MOV32rm, 4, Result+1), FrameIdx, 4);
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case MVT::i32:
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