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Add missing zextloadi1 to i64 patterns. PR16721.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183587 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -239,6 +239,9 @@ def LDXri : F3_2<3, 0b001011,
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[(set i64:$dst, (load ADDRri:$addr))]>;
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[(set i64:$dst, (load ADDRri:$addr))]>;
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// Extending loads to i64.
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// Extending loads to i64.
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def : Pat<(i64 (zextloadi1 ADDRrr:$addr)), (LDUBrr ADDRrr:$addr)>;
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def : Pat<(i64 (zextloadi1 ADDRri:$addr)), (LDUBri ADDRri:$addr)>;
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def : Pat<(i64 (zextloadi8 ADDRrr:$addr)), (LDUBrr ADDRrr:$addr)>;
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def : Pat<(i64 (zextloadi8 ADDRrr:$addr)), (LDUBrr ADDRrr:$addr)>;
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def : Pat<(i64 (zextloadi8 ADDRri:$addr)), (LDUBri ADDRri:$addr)>;
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def : Pat<(i64 (zextloadi8 ADDRri:$addr)), (LDUBri ADDRri:$addr)>;
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def : Pat<(i64 (extloadi8 ADDRrr:$addr)), (LDUBrr ADDRrr:$addr)>;
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def : Pat<(i64 (extloadi8 ADDRrr:$addr)), (LDUBrr ADDRrr:$addr)>;
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@ -161,6 +161,14 @@ define i64 @loads(i64* %p, i32* %q, i32* %r, i16* %s) {
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ret i64 %x3
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ret i64 %x3
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}
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}
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; CHECK: load_bool
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; CHECK: ldub [%i0], %i0
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define i64 @load_bool(i1* %p) {
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%a = load i1* %p
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%b = zext i1 %a to i64
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ret i64 %b
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}
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; CHECK: stores
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; CHECK: stores
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; CHECK: ldx [%i0+8], [[R:%[goli][0-7]]]
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; CHECK: ldx [%i0+8], [[R:%[goli][0-7]]]
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; CHECK: stx [[R]], [%i0+16]
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; CHECK: stx [[R]], [%i0+16]
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