From 7df28dc9d7160772c3c0aabd72c32830c1bb5e57 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 19 Dec 2006 01:44:04 +0000 Subject: [PATCH] May need to promote the operand (either sign_extend_inreg or and) before expanding a {s|u}int_to_fp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32665 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 47 +++++++++++++++--------- 1 file changed, 29 insertions(+), 18 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index faebbdcfafb..1b3e8d7d1dc 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -5072,24 +5072,6 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ case ISD::FP_ROUND: Lo = ExpandLibCall("__truncdfsf2", Node, Hi); break; - case ISD::SINT_TO_FP: { - const char *FnName = 0; - if (Node->getOperand(0).getValueType() == MVT::i64) - FnName = (VT == MVT::f32) ? "__floatdisf" : "__floatdidf"; - else - FnName = (VT == MVT::f32) ? "__floatsisf" : "__floatsidf"; - Lo = ExpandLibCall(FnName, Node, Hi); - break; - } - case ISD::UINT_TO_FP: { - const char *FnName = 0; - if (Node->getOperand(0).getValueType() == MVT::i64) - FnName = (VT == MVT::f32) ? "__floatundisf" : "__floatundidf"; - else - FnName = (VT == MVT::f32) ? "__floatunsisf" : "__floatunsidf"; - Lo = ExpandLibCall(FnName, Node, Hi); - break; - } case ISD::FSQRT: case ISD::FSIN: case ISD::FCOS: { @@ -5125,6 +5107,35 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ ExpandOp(Lo, Lo, Hi); break; } + case ISD::SINT_TO_FP: + case ISD::UINT_TO_FP: { + bool isSigned = Node->getOpcode() == ISD::SINT_TO_FP; + MVT::ValueType SrcVT = Node->getOperand(0).getValueType(); + const char *FnName = 0; + if (Node->getOperand(0).getValueType() == MVT::i64) { + if (VT == MVT::f32) + FnName = isSigned ? "__floatdisf" : "__floatundisf"; + else + FnName = isSigned ? "__floatdidf" : "__floatundidf"; + } else { + if (VT == MVT::f32) + FnName = isSigned ? "__floatsisf" : "__floatunsisf"; + else + FnName = isSigned ? "__floatsidf" : "__floatunsidf"; + } + + // Promote the operand if needed. + if (getTypeAction(SrcVT) == Promote) { + SDOperand Tmp = PromoteOp(Node->getOperand(0)); + Tmp = isSigned + ? DAG.getNode(ISD::SIGN_EXTEND_INREG, Tmp.getValueType(), Tmp, + DAG.getValueType(SrcVT)) + : DAG.getZeroExtendInReg(Tmp, SrcVT); + Node = DAG.UpdateNodeOperands(Op, Tmp).Val; + } + Lo = ExpandLibCall(FnName, Node, Hi); + break; + } } // Make sure the resultant values have been legalized themselves, unless this