[Hexagon] Use composition instead of inheritance from STL types

The standard containers are not designed to be inherited from, as
illustrated by the MSVC hacks for NodeOrdering. No functional change
intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242616 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2015-07-18 17:43:23 +00:00
parent cf0cbae8ca
commit 7e320cc2c8
4 changed files with 27 additions and 50 deletions

View File

@ -868,7 +868,7 @@ void BT::visitNonBranch(const MachineInstr *MI) {
continue; continue;
bool Changed = false; bool Changed = false;
if (!Eval || !ResMap.has(RD.Reg)) { if (!Eval || ResMap.count(RD.Reg) == 0) {
// Set to "ref" (aka "bottom"). // Set to "ref" (aka "bottom").
uint16_t DefBW = ME.getRegBitWidth(RD); uint16_t DefBW = ME.getRegBitWidth(RD);
RegisterCell RefC = RegisterCell::self(RD.Reg, DefBW); RegisterCell RefC = RegisterCell::self(RD.Reg, DefBW);
@ -1005,7 +1005,7 @@ void BT::put(RegisterRef RR, const RegisterCell &RC) {
// Replace all references to bits from OldRR with the corresponding bits // Replace all references to bits from OldRR with the corresponding bits
// in NewRR. // in NewRR.
void BT::subst(RegisterRef OldRR, RegisterRef NewRR) { void BT::subst(RegisterRef OldRR, RegisterRef NewRR) {
assert(Map.has(OldRR.Reg) && "OldRR not present in map"); assert(Map.count(OldRR.Reg) > 0 && "OldRR not present in map");
BitMask OM = ME.mask(OldRR.Reg, OldRR.Sub); BitMask OM = ME.mask(OldRR.Reg, OldRR.Sub);
BitMask NM = ME.mask(NewRR.Reg, NewRR.Sub); BitMask NM = ME.mask(NewRR.Reg, NewRR.Sub);
uint16_t OMB = OM.first(), OME = OM.last(); uint16_t OMB = OM.first(), OME = OM.last();

View File

@ -36,9 +36,7 @@ struct BitTracker {
typedef SetVector<const MachineBasicBlock *> BranchTargetList; typedef SetVector<const MachineBasicBlock *> BranchTargetList;
struct CellMapType : public std::map<unsigned,RegisterCell> { typedef std::map<unsigned, RegisterCell> CellMapType;
bool has(unsigned Reg) const;
};
BitTracker(const MachineEvaluator &E, MachineFunction &F); BitTracker(const MachineEvaluator &E, MachineFunction &F);
~BitTracker(); ~BitTracker();
@ -344,11 +342,6 @@ BitTracker::RegisterCell::ref(const RegisterCell &C) {
return RC; return RC;
} }
inline bool BitTracker::CellMapType::has(unsigned Reg) const {
return find(Reg) != end();
}
// A class to evaluate target's instructions and update the cell maps. // A class to evaluate target's instructions and update the cell maps.
// This is used internally by the bit tracker. A target that wants to // This is used internally by the bit tracker. A target that wants to
// utilize this should implement the evaluation functions (noted below) // utilize this should implement the evaluation functions (noted below)

View File

@ -95,30 +95,29 @@ BT::BitMask HexagonEvaluator::mask(unsigned Reg, unsigned Sub) const {
llvm_unreachable("Unexpected register/subregister"); llvm_unreachable("Unexpected register/subregister");
} }
namespace { namespace {
struct RegisterRefs : public std::vector<BT::RegisterRef> { class RegisterRefs {
typedef std::vector<BT::RegisterRef> Base; std::vector<BT::RegisterRef> Vector;
RegisterRefs(const MachineInstr *MI);
const BT::RegisterRef &operator[](unsigned n) const {
// The main purpose of this operator is to assert with bad argument.
assert(n < size());
return Base::operator[](n);
}
};
RegisterRefs::RegisterRefs(const MachineInstr *MI) public:
: Base(MI->getNumOperands()) { RegisterRefs(const MachineInstr *MI) : Vector(MI->getNumOperands()) {
for (unsigned i = 0, n = size(); i < n; ++i) { for (unsigned i = 0, n = Vector.size(); i < n; ++i) {
const MachineOperand &MO = MI->getOperand(i); const MachineOperand &MO = MI->getOperand(i);
if (MO.isReg()) if (MO.isReg())
at(i) = BT::RegisterRef(MO); Vector[i] = BT::RegisterRef(MO);
// For indices that don't correspond to registers, the entry will // For indices that don't correspond to registers, the entry will
// remain constructed via the default constructor. // remain constructed via the default constructor.
} }
} }
}
size_t size() const { return Vector.size(); }
const BT::RegisterRef &operator[](unsigned n) const {
// The main purpose of this operator is to assert with bad argument.
assert(n < Vector.size());
return Vector[n];
}
};
}
bool HexagonEvaluator::evaluate(const MachineInstr *MI, bool HexagonEvaluator::evaluate(const MachineInstr *MI,
const CellMapType &Inputs, CellMapType &Outputs) const { const CellMapType &Inputs, CellMapType &Outputs) const {

View File

@ -59,30 +59,23 @@ namespace {
// Numbering map for gep nodes. Used to keep track of ordering for // Numbering map for gep nodes. Used to keep track of ordering for
// gep nodes. // gep nodes.
struct NodeNumbering : public std::map<const GepNode*,unsigned> { struct NodeOrdering {
};
struct NodeOrdering : public NodeNumbering {
NodeOrdering() : LastNum(0) {} NodeOrdering() : LastNum(0) {}
#ifdef _MSC_VER
void special_insert_for_special_msvc(const GepNode *N) void insert(const GepNode *N) { Map.insert(std::make_pair(N, ++LastNum)); }
#else void clear() { Map.clear(); }
using NodeNumbering::insert;
void insert(const GepNode* N) bool operator()(const GepNode *N1, const GepNode *N2) const {
#endif auto F1 = Map.find(N1), F2 = Map.find(N2);
{ assert(F1 != Map.end() && F2 != Map.end());
insert(std::make_pair(N, ++LastNum));
}
bool operator() (const GepNode* N1, const GepNode *N2) const {
const_iterator F1 = find(N1), F2 = find(N2);
assert(F1 != end() && F2 != end());
return F1->second < F2->second; return F1->second < F2->second;
} }
private: private:
std::map<const GepNode *, unsigned> Map;
unsigned LastNum; unsigned LastNum;
}; };
class HexagonCommonGEP : public FunctionPass { class HexagonCommonGEP : public FunctionPass {
public: public:
static char ID; static char ID;
@ -360,11 +353,7 @@ void HexagonCommonGEP::processGepInst(GetElementPtrInst *GepI,
Us.insert(&UI.getUse()); Us.insert(&UI.getUse());
} }
Nodes.push_back(N); Nodes.push_back(N);
#ifdef _MSC_VER
NodeOrder.special_insert_for_special_msvc(N);
#else
NodeOrder.insert(N); NodeOrder.insert(N);
#endif
// Skip the first index operand, since we only handle 0. This dereferences // Skip the first index operand, since we only handle 0. This dereferences
// the pointer operand. // the pointer operand.
@ -379,11 +368,7 @@ void HexagonCommonGEP::processGepInst(GetElementPtrInst *GepI,
Nx->PTy = PtrTy; Nx->PTy = PtrTy;
Nx->Idx = Op; Nx->Idx = Op;
Nodes.push_back(Nx); Nodes.push_back(Nx);
#ifdef _MSC_VER
NodeOrder.special_insert_for_special_msvc(Nx);
#else
NodeOrder.insert(Nx); NodeOrder.insert(Nx);
#endif
PN = Nx; PN = Nx;
PtrTy = next_type(PtrTy, Op); PtrTy = next_type(PtrTy, Op);