diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td index 631e9bc1536..7ba36392e29 100644 --- a/lib/Target/X86/X86InstrFormats.td +++ b/lib/Target/X86/X86InstrFormats.td @@ -510,7 +510,7 @@ class FMA3 o, Format F, dag outs, dag ins, string asm, // FMA4 Instruction Templates class FMA4 o, Format F, dag outs, dag ins, string asm, listpattern> - : I, TA, + : Ii8, TA, OpSize, VEX_4V, VEX_I8IMM, Requires<[HasFMA4]>; // XOP 2, 3 and 4 Operand Instruction Template diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 8c16fe57b13..345f6064ae4 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -6563,14 +6563,14 @@ let Constraints = "$src1 = $dst" in { multiclass SS41I_quaternary_int_avx opc, string OpcodeStr, RegisterClass RC, X86MemOperand x86memop, PatFrag mem_frag, Intrinsic IntId> { - def rr : I, OpSize, TA, VEX_4V, VEX_I8IMM; - def rm : I