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ARM cost model: Account for zero cost scalar SROA instructions
By vectorizing a series of srl, or, ... instructions we have obfuscated the intention so much that the backend does not know how to fold this code away. radar://15336950 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193573 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -523,8 +523,20 @@ unsigned ARMTTI::getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueK
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if (Idx != -1)
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if (Idx != -1)
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return LT.first * CostTbl[Idx].Cost;
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return LT.first * CostTbl[Idx].Cost;
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unsigned Cost =
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TargetTransformInfo::getArithmeticInstrCost(Opcode, Ty, Op1Info, Op2Info);
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return TargetTransformInfo::getArithmeticInstrCost(Opcode, Ty, Op1Info,
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// This is somewhat of a hack. The problem that we are facing is that SROA
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Op2Info);
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// creates a sequence of shift, and, or instructions to construct values.
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// These sequences are recognized by the ISel and have zero-cost. Not so for
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// the vectorized code. Because we have support for v2i64 but not i64 those
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// sequences look particularily beneficial to vectorize.
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// To work around this we increase the cost of v2i64 operations to make them
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// seem less beneficial.
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if (LT.second == MVT::v2i64 &&
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Op2Info == TargetTransformInfo::OK_UniformConstantValue)
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Cost += 4;
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return Cost;
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}
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}
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@ -1013,9 +1013,24 @@ int BoUpSLP::getEntryCost(TreeEntry *E) {
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TTI->getCmpSelInstrCost(Opcode, ScalarTy, Builder.getInt1Ty());
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TTI->getCmpSelInstrCost(Opcode, ScalarTy, Builder.getInt1Ty());
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VecCost = TTI->getCmpSelInstrCost(Opcode, VecTy, MaskTy);
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VecCost = TTI->getCmpSelInstrCost(Opcode, VecTy, MaskTy);
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} else {
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} else {
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ScalarCost = VecTy->getNumElements() *
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// Certain instructions can be cheaper to vectorize if they have a
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TTI->getArithmeticInstrCost(Opcode, ScalarTy);
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// constant second vector operand.
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VecCost = TTI->getArithmeticInstrCost(Opcode, VecTy);
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TargetTransformInfo::OperandValueKind Op1VK =
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TargetTransformInfo::OK_AnyValue;
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TargetTransformInfo::OperandValueKind Op2VK =
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TargetTransformInfo::OK_UniformConstantValue;
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// Check whether all second operands are constant.
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for (unsigned i = 0; i < VL.size(); ++i)
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if (!isa<ConstantInt>(cast<Instruction>(VL[i])->getOperand(1))) {
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Op2VK = TargetTransformInfo::OK_AnyValue;
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break;
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}
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ScalarCost =
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VecTy->getNumElements() *
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TTI->getArithmeticInstrCost(Opcode, ScalarTy, Op1VK, Op2VK);
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VecCost = TTI->getArithmeticInstrCost(Opcode, VecTy, Op1VK, Op2VK);
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}
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}
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return VecCost - ScalarCost;
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return VecCost - ScalarCost;
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}
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}
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52
test/Transforms/SLPVectorizer/ARM/sroa.ll
Normal file
52
test/Transforms/SLPVectorizer/ARM/sroa.ll
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@ -0,0 +1,52 @@
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; RUN: opt -S -mcpu=swift -mtriple=thumbv7-apple-ios -basicaa -slp-vectorizer < %s | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
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%class.Complex = type { double, double }
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; Code like this is the result of SROA. Make sure we don't vectorize this
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; because the in the scalar version of this the shl/or are handled by the
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; backend and disappear, the vectorized code stays.
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; CHECK-LABEL: SROAed
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; CHECK-NOT: shl <2 x i64>
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; CHECK-NOT: or <2 x i64>
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define void @SROAed(%class.Complex* noalias nocapture sret %agg.result, [4 x i32] %a.coerce, [4 x i32] %b.coerce) {
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entry:
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%a.coerce.fca.0.extract = extractvalue [4 x i32] %a.coerce, 0
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%a.sroa.0.0.insert.ext = zext i32 %a.coerce.fca.0.extract to i64
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%a.coerce.fca.1.extract = extractvalue [4 x i32] %a.coerce, 1
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%a.sroa.0.4.insert.ext = zext i32 %a.coerce.fca.1.extract to i64
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%a.sroa.0.4.insert.shift = shl nuw i64 %a.sroa.0.4.insert.ext, 32
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%a.sroa.0.4.insert.insert = or i64 %a.sroa.0.4.insert.shift, %a.sroa.0.0.insert.ext
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%0 = bitcast i64 %a.sroa.0.4.insert.insert to double
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%a.coerce.fca.2.extract = extractvalue [4 x i32] %a.coerce, 2
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%a.sroa.3.8.insert.ext = zext i32 %a.coerce.fca.2.extract to i64
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%a.coerce.fca.3.extract = extractvalue [4 x i32] %a.coerce, 3
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%a.sroa.3.12.insert.ext = zext i32 %a.coerce.fca.3.extract to i64
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%a.sroa.3.12.insert.shift = shl nuw i64 %a.sroa.3.12.insert.ext, 32
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%a.sroa.3.12.insert.insert = or i64 %a.sroa.3.12.insert.shift, %a.sroa.3.8.insert.ext
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%1 = bitcast i64 %a.sroa.3.12.insert.insert to double
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%b.coerce.fca.0.extract = extractvalue [4 x i32] %b.coerce, 0
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%b.sroa.0.0.insert.ext = zext i32 %b.coerce.fca.0.extract to i64
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%b.coerce.fca.1.extract = extractvalue [4 x i32] %b.coerce, 1
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%b.sroa.0.4.insert.ext = zext i32 %b.coerce.fca.1.extract to i64
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%b.sroa.0.4.insert.shift = shl nuw i64 %b.sroa.0.4.insert.ext, 32
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%b.sroa.0.4.insert.insert = or i64 %b.sroa.0.4.insert.shift, %b.sroa.0.0.insert.ext
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%2 = bitcast i64 %b.sroa.0.4.insert.insert to double
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%b.coerce.fca.2.extract = extractvalue [4 x i32] %b.coerce, 2
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%b.sroa.3.8.insert.ext = zext i32 %b.coerce.fca.2.extract to i64
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%b.coerce.fca.3.extract = extractvalue [4 x i32] %b.coerce, 3
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%b.sroa.3.12.insert.ext = zext i32 %b.coerce.fca.3.extract to i64
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%b.sroa.3.12.insert.shift = shl nuw i64 %b.sroa.3.12.insert.ext, 32
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%b.sroa.3.12.insert.insert = or i64 %b.sroa.3.12.insert.shift, %b.sroa.3.8.insert.ext
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%3 = bitcast i64 %b.sroa.3.12.insert.insert to double
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%add = fadd double %0, %2
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%add3 = fadd double %1, %3
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%re.i.i = getelementptr inbounds %class.Complex* %agg.result, i32 0, i32 0
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store double %add, double* %re.i.i, align 4
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%im.i.i = getelementptr inbounds %class.Complex* %agg.result, i32 0, i32 1
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store double %add3, double* %im.i.i, align 4
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ret void
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}
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