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Fix SelectionDAGBuild lowering of Select instructions to
handle first-class aggregate values. Also, fix a bug in the Ret handling for empty aggregates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57925 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -902,11 +902,13 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
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SmallVector<SDValue, 8> NewValues;
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NewValues.push_back(getControlRoot());
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for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
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SDValue RetOp = getValue(I.getOperand(i));
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SmallVector<MVT, 4> ValueVTs;
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ComputeValueVTs(TLI, I.getOperand(i)->getType(), ValueVTs);
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for (unsigned j = 0, f = ValueVTs.size(); j != f; ++j) {
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unsigned NumValues = ValueVTs.size();
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if (NumValues == 0) continue;
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SDValue RetOp = getValue(I.getOperand(i));
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for (unsigned j = 0, f = NumValues; j != f; ++j) {
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MVT VT = ValueVTs[j];
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// FIXME: C calling convention requires the return type to be promoted to
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@ -2137,11 +2139,23 @@ void SelectionDAGLowering::visitVFCmp(User &I) {
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}
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void SelectionDAGLowering::visitSelect(User &I) {
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SDValue Cond = getValue(I.getOperand(0));
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SDValue TrueVal = getValue(I.getOperand(1));
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SDValue FalseVal = getValue(I.getOperand(2));
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setValue(&I, DAG.getNode(ISD::SELECT, TrueVal.getValueType(), Cond,
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TrueVal, FalseVal));
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SmallVector<MVT, 4> ValueVTs;
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ComputeValueVTs(TLI, I.getType(), ValueVTs);
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unsigned NumValues = ValueVTs.size();
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if (NumValues != 0) {
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SmallVector<SDValue, 4> Values(NumValues);
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SDValue Cond = getValue(I.getOperand(0));
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SDValue TrueVal = getValue(I.getOperand(1));
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SDValue FalseVal = getValue(I.getOperand(2));
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for (unsigned i = 0; i != NumValues; ++i)
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Values[i] = DAG.getNode(ISD::SELECT, TrueVal.getValueType(), Cond,
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SDValue(TrueVal.getNode(), TrueVal.getResNo() + i),
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SDValue(FalseVal.getNode(), FalseVal.getResNo() + i));
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setValue(&I, DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], NumValues),
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&Values[0], NumValues));
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}
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}
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24
test/CodeGen/X86/pr2924.ll
Normal file
24
test/CodeGen/X86/pr2924.ll
Normal file
@ -0,0 +1,24 @@
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; RUN: llvm-as < %s | llc
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; PR2924
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target datalayout =
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"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
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target triple = "i686-pc-linux-gnu"
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define x86_stdcallcc { i32, i8* } @_D3std6string7toupperFAaZAa({ i32, i8* } %s) {
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entry_std.string.toupper:
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%tmp58 = load i32* null
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%tmp59 = icmp eq i32 %tmp58, 0
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%r.val = load { i32, i8* }* null, align 8
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%condtmp.0 = select i1 %tmp59, { i32, i8* } undef, { i32, i8* } %r.val
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ret { i32, i8* } %condtmp.0
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}
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define { } @empty({ } %s) {
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entry_std.string.toupper:
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%tmp58 = load i32* null
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%tmp59 = icmp eq i32 %tmp58, 0
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%r.val = load { }* null, align 8
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%condtmp.0 = select i1 %tmp59, { } undef, { } %r.val
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ret { } %condtmp.0
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}
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