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Fix PR22222
The bug was introduced in r225282. r225282 assumed that sub X, Y is the same as add X, -Y. This is not correct if we are going to upgrade the sub to sub nuw. This change fixes the issue by making the optimization ignore sub instructions. Differential Revision: http://reviews.llvm.org/D6979 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226075 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjoy Das
parent
5a40bef797
commit
7ec1829823
@ -278,9 +278,8 @@ bool SimplifyIndvar::strengthenOverflowingOperation(BinaryOperator *BO,
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Value *IVOperand) {
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// Currently we only handle instructions of the form "add <indvar> <value>"
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// and "sub <indvar> <value>".
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unsigned Op = BO->getOpcode();
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if (!(Op == Instruction::Add || Op == Instruction::Sub))
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if (Op != Instruction::Add)
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return false;
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// If BO is already both nuw and nsw then there is nothing left to do
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@ -304,15 +303,6 @@ bool SimplifyIndvar::strengthenOverflowingOperation(BinaryOperator *BO,
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if (OtherOpSCEV == SE->getCouldNotCompute())
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return false;
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if (Op == Instruction::Sub) {
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// If the subtraction is of the form "sub <indvar>, <op>", then pretend it
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// is "add <indvar>, -<op>" and continue, else bail out.
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if (OtherOperandIdx != 1)
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return false;
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OtherOpSCEV = SE->getNegativeSCEV(OtherOpSCEV);
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}
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const SCEV *IVOpSCEV = SE->getSCEV(IVOperand);
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const SCEV *ZeroSCEV = SE->getConstant(IVOpSCEV->getType(), 0);
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46
test/Transforms/IndVarSimplify/pr22222.ll
Normal file
46
test/Transforms/IndVarSimplify/pr22222.ll
Normal file
@ -0,0 +1,46 @@
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; RUN: opt -indvars -S < %s | FileCheck %s
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@b = common global i32 0, align 4
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@c = common global i32 0, align 4
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@a = common global i32 0, align 4
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declare void @abort() #1
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; Function Attrs: nounwind ssp uwtable
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define i32 @main() {
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entry:
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%a.promoted13 = load i32* @a, align 4
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br label %for.cond1.preheader
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for.cond1.preheader: ; preds = %entry, %for.end
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%or.lcssa14 = phi i32 [ %a.promoted13, %entry ], [ %or.lcssa, %for.end ]
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%d.010 = phi i32 [ 1, %entry ], [ 0, %for.end ]
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br label %for.body3
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for.body3: ; preds = %for.cond1.preheader, %for.body3
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%inc12 = phi i32 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
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%or11 = phi i32 [ %or.lcssa14, %for.cond1.preheader ], [ %or, %for.body3 ]
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; CHECK-NOT: sub nuw i32 %inc12, %d.010
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; CHECK: sub i32 %inc12, %d.010
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%add = sub i32 %inc12, %d.010
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%or = or i32 %or11, %add
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%inc = add i32 %inc12, 1
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br i1 false, label %for.body3, label %for.end
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for.end: ; preds = %for.body3
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%or.lcssa = phi i32 [ %or, %for.body3 ]
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br i1 false, label %for.cond1.preheader, label %for.end6
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for.end6: ; preds = %for.end
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%or.lcssa.lcssa = phi i32 [ %or.lcssa, %for.end ]
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store i32 %or.lcssa.lcssa, i32* @a, align 4
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%cmp7 = icmp eq i32 %or.lcssa.lcssa, -1
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br i1 %cmp7, label %if.end, label %if.then
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if.then: ; preds = %for.end6
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tail call void @abort() #2
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unreachable
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if.end: ; preds = %for.end6
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ret i32 0
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}
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@ -52,58 +52,6 @@ define i32 @test.signed.add.1(i32* %array, i32 %length, i32 %init) {
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ret i32 42
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}
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define i32 @test.signed.sub.0(i32* %array, i32 %length, i32 %init) {
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; CHECK-LABEL: @test.signed.sub.0
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entry:
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%upper = icmp sgt i32 %init, %length
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br i1 %upper, label %loop, label %exit
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loop:
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; CHECK-LABEL: loop
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%civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ]
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%civ.inc = sub i32 %civ, 1
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; CHECK: %civ.inc = sub nsw i32 %civ, 1
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%cmp = icmp slt i32 %civ.inc, %length
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br i1 %cmp, label %latch, label %break
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latch:
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store i32 0, i32* %array
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%check = icmp sgt i32 %civ.inc, %length
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br i1 %check, label %loop, label %break
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break:
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ret i32 %civ.inc
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exit:
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ret i32 42
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}
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define i32 @test.signed.sub.1(i32* %array, i32 %length, i32 %init) {
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; CHECK-LABEL: @test.signed.sub.1
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entry:
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%upper = icmp sgt i32 %init, %length
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br i1 %upper, label %loop, label %exit
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loop:
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; CHECK-LABEL: loop
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%civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ]
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%civ.inc = sub i32 %civ, 1
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; CHECK: %civ.inc = sub i32 %civ, 1
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%cmp = icmp slt i32 %civ.inc, %length
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br i1 %cmp, label %latch, label %break
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latch:
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store i32 0, i32* %array
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%check = icmp sge i32 %civ.inc, %length
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br i1 %check, label %loop, label %break
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break:
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ret i32 %civ.inc
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exit:
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ret i32 42
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}
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define i32 @test.unsigned.add.0(i32* %array, i32 %length, i32 %init) {
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; CHECK-LABEL: @test.unsigned.add.0
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entry:
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@ -156,59 +104,5 @@ define i32 @test.unsigned.add.1(i32* %array, i32 %length, i32 %init) {
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ret i32 42
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}
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define i32 @test.unsigned.sub.0(i32* %array, i32* %length_ptr, i32 %init) {
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; CHECK-LABEL: @test.unsigned.sub.0
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entry:
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%length = load i32* %length_ptr, !range !0
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%upper = icmp ult i32 %init, %length
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br i1 %upper, label %loop, label %exit
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loop:
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; CHECK-LABEL: loop
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%civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ]
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%civ.inc = sub i32 %civ, 2
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; CHECK: %civ.inc = sub nuw i32 %civ, 2
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%cmp = icmp slt i32 %civ.inc, %length
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br i1 %cmp, label %latch, label %break
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latch:
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store i32 0, i32* %array
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%check = icmp ult i32 %civ.inc, %length
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br i1 %check, label %loop, label %break
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break:
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ret i32 %civ.inc
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exit:
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ret i32 42
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}
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define i32 @test.unsigned.sub.1(i32* %array, i32* %length_ptr, i32 %init) {
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; CHECK-LABEL: @test.unsigned.sub.1
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entry:
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%length = load i32* %length_ptr, !range !1
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%upper = icmp ult i32 %init, %length
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br i1 %upper, label %loop, label %exit
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loop:
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; CHECK-LABEL: loop
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%civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ]
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%civ.inc = sub i32 %civ, 2
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; CHECK: %civ.inc = sub i32 %civ, 2
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%cmp = icmp slt i32 %civ.inc, %length
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br i1 %cmp, label %latch, label %break
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latch:
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store i32 0, i32* %array
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%check = icmp ult i32 %civ.inc, %length
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br i1 %check, label %loop, label %break
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break:
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ret i32 %civ.inc
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exit:
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ret i32 42
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}
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!0 = !{i32 0, i32 2}
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!1 = !{i32 0, i32 42}
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