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Replace a few more SmallVectors with arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92265 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5128,12 +5128,9 @@ SDValue X86TargetLowering::BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain,
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Tys = DAG.getVTList(MVT::f64, MVT::Other, MVT::Flag);
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else
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Tys = DAG.getVTList(Op.getValueType(), MVT::Other);
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SmallVector<SDValue, 8> Ops;
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Ops.push_back(Chain);
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Ops.push_back(StackSlot);
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Ops.push_back(DAG.getValueType(SrcVT));
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SDValue Ops[] = { Chain, StackSlot, DAG.getValueType(SrcVT) };
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SDValue Result = DAG.getNode(useSSE ? X86ISD::FILD_FLAG : X86ISD::FILD, dl,
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Tys, &Ops[0], Ops.size());
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Tys, Ops, array_lengthof(Ops));
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if (useSSE) {
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Chain = Result.getValue(1);
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@ -5146,13 +5143,10 @@ SDValue X86TargetLowering::BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain,
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int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8, false);
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SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
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Tys = DAG.getVTList(MVT::Other);
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SmallVector<SDValue, 8> Ops;
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Ops.push_back(Chain);
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Ops.push_back(Result);
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Ops.push_back(StackSlot);
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Ops.push_back(DAG.getValueType(Op.getValueType()));
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Ops.push_back(InFlag);
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Chain = DAG.getNode(X86ISD::FST, dl, Tys, &Ops[0], Ops.size());
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SDValue Ops[] = {
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Chain, Result, StackSlot, DAG.getValueType(Op.getValueType()), InFlag
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};
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Chain = DAG.getNode(X86ISD::FST, dl, Tys, Ops, array_lengthof(Ops));
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Result = DAG.getLoad(Op.getValueType(), dl, Chain, StackSlot,
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PseudoSourceValue::getFixedStack(SSFI), 0);
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}
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@ -5947,14 +5941,10 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) {
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}
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SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Flag);
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SmallVector<SDValue, 4> Ops;
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// X86ISD::CMOV means set the result (which is operand 1) to the RHS if
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// condition is true.
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Ops.push_back(Op.getOperand(2));
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Ops.push_back(Op.getOperand(1));
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Ops.push_back(CC);
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Ops.push_back(Cond);
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return DAG.getNode(X86ISD::CMOV, dl, VTs, &Ops[0], Ops.size());
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SDValue Ops[] = { Op.getOperand(2), Op.getOperand(1), CC, Cond };
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return DAG.getNode(X86ISD::CMOV, dl, VTs, Ops, array_lengthof(Ops));
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}
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// isAndOrOfSingleUseSetCCs - Return true if node is an ISD::AND or
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@ -6265,11 +6255,8 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
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InFlag = Chain.getValue(1);
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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SmallVector<SDValue, 8> Ops;
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Ops.push_back(Chain);
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Ops.push_back(DAG.getValueType(AVT));
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Ops.push_back(InFlag);
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Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, &Ops[0], Ops.size());
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SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
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Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops));
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if (TwoRepStos) {
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InFlag = Chain.getValue(1);
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@ -6282,11 +6269,8 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
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Left, InFlag);
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InFlag = Chain.getValue(1);
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Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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Ops.clear();
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Ops.push_back(Chain);
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Ops.push_back(DAG.getValueType(MVT::i8));
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Ops.push_back(InFlag);
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Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, &Ops[0], Ops.size());
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SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
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Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops));
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} else if (BytesLeft) {
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// Handle the last 1 - 7 bytes.
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unsigned Offset = SizeVal - BytesLeft;
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@ -6350,11 +6334,9 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
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InFlag = Chain.getValue(1);
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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SmallVector<SDValue, 8> Ops;
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Ops.push_back(Chain);
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Ops.push_back(DAG.getValueType(AVT));
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Ops.push_back(InFlag);
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SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, &Ops[0], Ops.size());
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SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
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SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops,
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array_lengthof(Ops));
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SmallVector<SDValue, 4> Results;
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Results.push_back(RepMovs);
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@ -6978,12 +6960,13 @@ SDValue X86TargetLowering::LowerCTLZ(SDValue Op, SelectionDAG &DAG) {
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Op = DAG.getNode(X86ISD::BSR, dl, VTs, Op);
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// If src is zero (i.e. bsr sets ZF), returns NumBits.
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SmallVector<SDValue, 4> Ops;
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Ops.push_back(Op);
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Ops.push_back(DAG.getConstant(NumBits+NumBits-1, OpVT));
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Ops.push_back(DAG.getConstant(X86::COND_E, MVT::i8));
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Ops.push_back(Op.getValue(1));
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Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, &Ops[0], 4);
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SDValue Ops[] = {
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Op,
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DAG.getConstant(NumBits+NumBits-1, OpVT),
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DAG.getConstant(X86::COND_E, MVT::i8),
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Op.getValue(1)
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};
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Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, Ops, array_lengthof(Ops));
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// Finally xor with NumBits-1.
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Op = DAG.getNode(ISD::XOR, dl, OpVT, Op, DAG.getConstant(NumBits-1, OpVT));
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@ -7010,12 +6993,13 @@ SDValue X86TargetLowering::LowerCTTZ(SDValue Op, SelectionDAG &DAG) {
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Op = DAG.getNode(X86ISD::BSF, dl, VTs, Op);
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// If src is zero (i.e. bsf sets ZF), returns NumBits.
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SmallVector<SDValue, 4> Ops;
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Ops.push_back(Op);
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Ops.push_back(DAG.getConstant(NumBits, OpVT));
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Ops.push_back(DAG.getConstant(X86::COND_E, MVT::i8));
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Ops.push_back(Op.getValue(1));
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Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, &Ops[0], 4);
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SDValue Ops[] = {
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Op,
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DAG.getConstant(NumBits, OpVT),
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DAG.getConstant(X86::COND_E, MVT::i8),
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Op.getValue(1)
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};
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Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, Ops, array_lengthof(Ops));
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if (VT == MVT::i8)
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Op = DAG.getNode(ISD::TRUNCATE, dl, MVT::i8, Op);
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