6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-23 01:30:19 +00:00
Code Issues Projects Releases Wiki Activity

Give each MCCFIInstruction its own opcode.

Browse Source 
This untangles the switch cases of the old Move and RelMove opcodes a bit
and makes it clear how to add new instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168534 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2012-11-24 03:10:54 +00:00
parent 529a01df02
commit 7f74d2c2c1
3 changed files with 84 additions and 59 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
include/llvm/MC/MCDwarf.h
View File

@ -266,8 +266,9 @@ namespace llvm {
class MCCFIInstruction {
public:
enum OpType { SameValue, RememberState, RestoreState, Move, RelMove, Escape,
Restore, Undefined };
enum OpType { OpSameValue, OpRememberState, OpRestoreState, OpOffset,
OpDefCfaRegister, OpDefCfaOffset, OpDefCfa, OpRelOffset,
OpAdjustCfaOffset, OpEscape, OpRestore, OpUndefined };
private:
OpType Operation;
MCSymbol *Label;
@ -283,11 +284,10 @@ namespace llvm {
public:
static MCCFIInstruction
createCFIOffset(MCSymbol *L, unsigned Register, int Offset) {
createOffset(MCSymbol *L, unsigned Register, int Offset) {
MachineLocation Dest(Register, Offset);
MachineLocation Source(Register, Offset);
MCCFIInstruction Ret(Move, L, Dest, Source, "");
MCCFIInstruction Ret(OpOffset, L, Dest, Source, "");
return Ret;
}
@ -295,14 +295,14 @@ namespace llvm {
createDefCfaRegister(MCSymbol *L, unsigned Register) {
MachineLocation Dest(Register);
MachineLocation Source(MachineLocation::VirtualFP);
MCCFIInstruction Ret(Move, L, Dest, Source, "");
MCCFIInstruction Ret(OpDefCfaRegister, L, Dest, Source, "");
return Ret;
}
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset) {
MachineLocation Dest(MachineLocation::VirtualFP);
MachineLocation Source(MachineLocation::VirtualFP, -Offset);
MCCFIInstruction Ret(Move, L, Dest, Source, "");
MCCFIInstruction Ret(OpDefCfaOffset, L, Dest, Source, "");
return Ret;
}
@ -310,40 +310,40 @@ namespace llvm {
createDefCfa(MCSymbol *L, unsigned Register, int Offset) {
MachineLocation Dest(MachineLocation::VirtualFP);
MachineLocation Source(Register, -Offset);
MCCFIInstruction Ret(Move, L, Dest, Source, "");
MCCFIInstruction Ret(OpDefCfa, L, Dest, Source, "");
return Ret;
}
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register) {
MachineLocation Dummy;
MachineLocation Dest(Register);
MCCFIInstruction Ret(Undefined, L, Dest, Dummy, "");
MCCFIInstruction Ret(OpUndefined, L, Dest, Dummy, "");
return Ret;
}
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register) {
MachineLocation Dummy;
MachineLocation Dest(Register);
MCCFIInstruction Ret(Restore, L, Dest, Dummy, "");
MCCFIInstruction Ret(OpRestore, L, Dest, Dummy, "");
return Ret;
}
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register) {
MachineLocation Dummy;
MachineLocation Dest(Register);
MCCFIInstruction Ret(SameValue, L, Dest, Dummy, "");
MCCFIInstruction Ret(OpSameValue, L, Dest, Dummy, "");
return Ret;
}
static MCCFIInstruction createRestoreState(MCSymbol *L) {
MachineLocation Dummy;
MCCFIInstruction Ret(RestoreState, L, Dummy, Dummy, "");
MCCFIInstruction Ret(OpRestoreState, L, Dummy, Dummy, "");
return Ret;
}
static MCCFIInstruction createRememberState(MCSymbol *L) {
MachineLocation Dummy;
MCCFIInstruction Ret(RememberState, L, Dummy, Dummy, "");
MCCFIInstruction Ret(OpRememberState, L, Dummy, Dummy, "");
return Ret;
}
@ -351,7 +351,7 @@ namespace llvm {
createRelOffset(MCSymbol *L, unsigned Register, int Offset) {
MachineLocation Dest(Register, Offset);
MachineLocation Source(Register, Offset);
MCCFIInstruction Ret(RelMove, L, Dest, Source, "");
MCCFIInstruction Ret(OpRelOffset, L, Dest, Source, "");
return Ret;
}
@ -359,13 +359,13 @@ namespace llvm {
createAdjustCfaOffset(MCSymbol *L, int Adjustment) {
MachineLocation Dest(MachineLocation::VirtualFP);
MachineLocation Source(MachineLocation::VirtualFP, Adjustment);
MCCFIInstruction Ret(RelMove, L, Dest, Source, "");
MCCFIInstruction Ret(OpAdjustCfaOffset, L, Dest, Source, "");
return Ret;
}
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals) {
MachineLocation Dummy;
MCCFIInstruction Ret(Escape, L, Dummy, Dummy, Vals);
MCCFIInstruction Ret(OpEscape, L, Dummy, Dummy, Vals);
return Ret;
}

109
lib/MC/MCDwarf.cpp
View File

@ -938,7 +938,7 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
bool VerboseAsm = Streamer.isVerboseAsm();
switch (Instr.getOperation()) {
case MCCFIInstruction::Undefined: {
case MCCFIInstruction::OpUndefined: {
unsigned Reg = Instr.getDestination().getReg();
if (VerboseAsm) {
Streamer.AddComment("DW_CFA_undefined");
@ -948,43 +948,68 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
Streamer.EmitULEB128IntValue(Reg);
return;
}
case MCCFIInstruction::Move:
case MCCFIInstruction::RelMove: {
case MCCFIInstruction::OpAdjustCfaOffset:
case MCCFIInstruction::OpDefCfaOffset: {
const MachineLocation &Src = Instr.getSource();
const bool IsRelative =
Instr.getOperation() == MCCFIInstruction::OpAdjustCfaOffset;
if (VerboseAsm)
Streamer.AddComment("DW_CFA_def_cfa_offset");
Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_offset, 1);
if (IsRelative)
CFAOffset += Src.getOffset();
else
CFAOffset = -Src.getOffset();
if (VerboseAsm)
Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
Streamer.EmitULEB128IntValue(CFAOffset);
return;
}
case MCCFIInstruction::OpDefCfa: {
const MachineLocation &Src = Instr.getSource();
if (VerboseAsm)
Streamer.AddComment("DW_CFA_def_cfa");
Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa, 1);
if (VerboseAsm)
Streamer.AddComment(Twine("Reg ") + Twine(Src.getReg()));
Streamer.EmitULEB128IntValue(Src.getReg());
CFAOffset = -Src.getOffset();
if (VerboseAsm)
Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
Streamer.EmitULEB128IntValue(CFAOffset);
return;
}
case MCCFIInstruction::OpDefCfaRegister: {
const MachineLocation &Dst = Instr.getDestination();
assert(Dst.isReg() && "Machine move not supported yet.");
if (VerboseAsm)
Streamer.AddComment("DW_CFA_def_cfa_register");
Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_register, 1);
if (VerboseAsm)
Streamer.AddComment(Twine("Reg ") + Twine(Dst.getReg()));
Streamer.EmitULEB128IntValue(Dst.getReg());
return;
}
case MCCFIInstruction::OpOffset:
case MCCFIInstruction::OpRelOffset: {
const MachineLocation &Dst = Instr.getDestination();
const MachineLocation &Src = Instr.getSource();
const bool IsRelative = Instr.getOperation() == MCCFIInstruction::RelMove;
// If advancing cfa.
if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
if (Src.getReg() == MachineLocation::VirtualFP) {
if (VerboseAsm) Streamer.AddComment("DW_CFA_def_cfa_offset");
Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_offset, 1);
} else {
if (VerboseAsm) Streamer.AddComment("DW_CFA_def_cfa");
Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa, 1);
if (VerboseAsm) Streamer.AddComment(Twine("Reg ") +
Twine(Src.getReg()));
Streamer.EmitULEB128IntValue(Src.getReg());
}
if (IsRelative)
CFAOffset += Src.getOffset();
else
CFAOffset = -Src.getOffset();
if (VerboseAsm) Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
Streamer.EmitULEB128IntValue(CFAOffset);
return;
}
if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) {
assert(Dst.isReg() && "Machine move not supported yet.");
if (VerboseAsm) Streamer.AddComment("DW_CFA_def_cfa_register");
Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_register, 1);
if (VerboseAsm) Streamer.AddComment(Twine("Reg ") + Twine(Dst.getReg()));
Streamer.EmitULEB128IntValue(Dst.getReg());
return;
}
const bool IsRelative =
Instr.getOperation() == MCCFIInstruction::OpRelOffset;
unsigned Reg = Src.getReg();
int Offset = Dst.getOffset();
@ -1015,15 +1040,15 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
}
return;
}
case MCCFIInstruction::RememberState:
case MCCFIInstruction::OpRememberState:
if (VerboseAsm) Streamer.AddComment("DW_CFA_remember_state");
Streamer.EmitIntValue(dwarf::DW_CFA_remember_state, 1);
return;
case MCCFIInstruction::RestoreState:
case MCCFIInstruction::OpRestoreState:
if (VerboseAsm) Streamer.AddComment("DW_CFA_restore_state");
Streamer.EmitIntValue(dwarf::DW_CFA_restore_state, 1);
return;
case MCCFIInstruction::SameValue: {
case MCCFIInstruction::OpSameValue: {
unsigned Reg = Instr.getDestination().getReg();
if (VerboseAsm) Streamer.AddComment("DW_CFA_same_value");
Streamer.EmitIntValue(dwarf::DW_CFA_same_value, 1);
@ -1031,7 +1056,7 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
Streamer.EmitULEB128IntValue(Reg);
return;
}
case MCCFIInstruction::Restore: {
case MCCFIInstruction::OpRestore: {
unsigned Reg = Instr.getDestination().getReg();
if (VerboseAsm) {
Streamer.AddComment("DW_CFA_restore");
@ -1040,7 +1065,7 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
Streamer.EmitIntValue(dwarf::DW_CFA_restore | Reg, 1);
return;
}
case MCCFIInstruction::Escape:
case MCCFIInstruction::OpEscape:
if (VerboseAsm) Streamer.AddComment("Escape bytes");
Streamer.EmitBytes(Instr.getValues(), 0);
return;
@ -1276,7 +1301,7 @@ const MCSymbol &FrameEmitterImpl::EmitCIE(MCStreamer &streamer,
unsigned Reg = Src.getReg();
int Offset = Dst.getOffset();
MCCFIInstruction Inst =
MCCFIInstruction::createCFIOffset(Label, Reg, Offset);
MCCFIInstruction::createOffset(Label, Reg, Offset);
Instructions.push_back(Inst);
}
}

2
lib/MC/MCStreamer.cpp
View File

@ -276,7 +276,7 @@ void MCStreamer::EmitCFIDefCfaRegister(int64_t Register) {
void MCStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) {
MCSymbol *Label = EmitCFICommon();
MCCFIInstruction Instruction =
MCCFIInstruction::createCFIOffset(Label, Register, Offset);
MCCFIInstruction::createOffset(Label, Register, Offset);
MCDwarfFrameInfo *CurFrame = getCurrentFrameInfo();
CurFrame->Instructions.push_back(Instruction);
}