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Make these predicates correct in 64-bit mode too.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-06-20 23:21:20 +00:00
parent b410dc9977
commit 7f7b346e3d
1 changed files with 5 additions and 2 deletions
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7
lib/Target/PowerPC/PPCInstrInfo.td
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@ -122,12 +122,15 @@ def HA16 : SDNodeXForm<imm, [{
def immSExt16 : PatLeaf<(imm), [{
// immSExt16 predicate - True if the immediate fits in a 16-bit sign extended
// field. Used by instructions like 'addi'.
return (int)N->getValue() == (short)N->getValue();
if (N->getValueType(0) == MVT::i32)
return (int32_t)N->getValue() == (short)N->getValue();
else
return (int64_t)N->getValue() == (short)N->getValue();
}]>;
def immZExt16 : PatLeaf<(imm), [{
// immZExt16 predicate - True if the immediate fits in a 16-bit zero extended
// field. Used by instructions like 'ori'.
return (unsigned)N->getValue() == (unsigned short)N->getValue();
return (uint64_t)N->getValue() == (unsigned short)N->getValue();
}], LO16>;
// imm16Shifted* - These match immediates where the low 16-bits are zero. There