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Make these predicates correct in 64-bit mode too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -122,12 +122,15 @@ def HA16 : SDNodeXForm<imm, [{
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def immSExt16 : PatLeaf<(imm), [{
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// immSExt16 predicate - True if the immediate fits in a 16-bit sign extended
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// field. Used by instructions like 'addi'.
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return (int)N->getValue() == (short)N->getValue();
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if (N->getValueType(0) == MVT::i32)
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return (int32_t)N->getValue() == (short)N->getValue();
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else
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return (int64_t)N->getValue() == (short)N->getValue();
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}]>;
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def immZExt16 : PatLeaf<(imm), [{
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// immZExt16 predicate - True if the immediate fits in a 16-bit zero extended
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// field. Used by instructions like 'ori'.
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return (unsigned)N->getValue() == (unsigned short)N->getValue();
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return (uint64_t)N->getValue() == (unsigned short)N->getValue();
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}], LO16>;
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// imm16Shifted* - These match immediates where the low 16-bits are zero. There
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