Add a flag to enable/disable subregister liveness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223884 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/MachineRegisterInfo.h

@@ -52,6 +52,9 @@ private:
   /// accurate when after this flag is cleared.
   bool TracksLiveness;
 
+  /// True if subregister liveness is tracked.
+  bool TracksSubRegLiveness;
+
   /// VRegInfo - Information we keep for each virtual register.
   ///
   /// Each element in this list contains the register class of the vreg and the
@@ -179,6 +182,12 @@ public:
   /// information.
   void invalidateLiveness() { TracksLiveness = false; }
 
+  bool tracksSubRegLiveness() const { return TracksSubRegLiveness; }
+
+  void enableSubRegLiveness(bool Enable = true) {
+    TracksSubRegLiveness = Enable;
+  }
+
   //===--------------------------------------------------------------------===//
   // Register Info
   //===--------------------------------------------------------------------===//

include/llvm/Target/TargetSubtargetInfo.h

@@ -168,6 +168,11 @@ public:
   virtual std::unique_ptr<PBQPRAConstraint> getCustomPBQPConstraints() const {
     return nullptr;
   }
+
+  /// Enable tracking of subregister liveness in register allocator.
+  virtual bool enableSubRegLiveness() const {
+    return false;
+  }
 };
 
 } // End llvm namespace

lib/CodeGen/LiveIntervalAnalysis.cpp

@@ -63,6 +63,10 @@ static cl::opt<bool> EnablePrecomputePhysRegs(
 static bool EnablePrecomputePhysRegs = false;
 #endif // NDEBUG
 
+static cl::opt<bool> EnableSubRegLiveness(
+  "enable-subreg-liveness", cl::Hidden, cl::init(true),
+  cl::desc("Enable subregister liveness tracking."));
+
 void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.setPreservesCFG();
   AU.addRequired<AliasAnalysis>();
@@ -116,6 +120,10 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
   AA = &getAnalysis<AliasAnalysis>();
   Indexes = &getAnalysis<SlotIndexes>();
   DomTree = &getAnalysis<MachineDominatorTree>();
+
+  if (EnableSubRegLiveness && MF->getSubtarget().enableSubRegLiveness())
+    MRI->enableSubRegLiveness(true);
+
   if (!LRCalc)
     LRCalc = new LiveRangeCalc();
 

lib/CodeGen/LiveRangeCalc.cpp

@@ -55,7 +55,7 @@ void LiveRangeCalc::createDeadDefs(LiveInterval &LI) {
     const MachineInstr *MI = MO.getParent();
     SlotIndex Idx = getDefIndex(*Indexes, *MI, MO.isEarlyClobber());
     unsigned SubReg = MO.getSubReg();
-    if (SubReg != 0 || LI.hasSubRanges()) {
+    if (LI.hasSubRanges() || (SubReg != 0 && MRI->tracksSubRegLiveness())) {
       unsigned Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg)
                                   : MRI->getMaxLaneMaskForVReg(Reg);
 
@@ -179,7 +179,8 @@ void LiveRangeCalc::extendToUses(LiveInterval &LI) {
       continue;
     SlotIndex Idx = getUseIndex(*Indexes, MO);
     unsigned SubReg = MO.getSubReg();
-    if (MO.isUse() && (LI.hasSubRanges() || SubReg != 0)) {
+    if (MO.isUse() && (LI.hasSubRanges() ||
+                       (MRI->tracksSubRegLiveness() && SubReg != 0))) {
       unsigned Mask = SubReg != 0
         ? TRI.getSubRegIndexLaneMask(SubReg)
         : Mask = MRI->getMaxLaneMaskForVReg(Reg);

lib/CodeGen/MachineRegisterInfo.cpp

@@ -24,7 +24,8 @@ using namespace llvm;
 void MachineRegisterInfo::Delegate::anchor() {}
 
 MachineRegisterInfo::MachineRegisterInfo(const MachineFunction *MF)
-  : MF(MF), TheDelegate(nullptr), IsSSA(true), TracksLiveness(true) {
+  : MF(MF), TheDelegate(nullptr), IsSSA(true), TracksLiveness(true),
+    TracksSubRegLiveness(false) {
   VRegInfo.reserve(256);
   RegAllocHints.reserve(256);
   UsedRegUnits.resize(getTargetRegisterInfo()->getNumRegUnits());