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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 19:29:31 +00:00
Removed LowerRETURADDR, fixed small bug into LowerRET, LowerGlobalAddress
fixed to generate instructions (add, lui) glued! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41158 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -142,7 +142,7 @@ SelectAddr(SDOperand Op, SDOperand Addr, SDOperand &Offset, SDOperand &Base)
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Addr.getOpcode() == ISD::TargetGlobalAddress))
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Addr.getOpcode() == ISD::TargetGlobalAddress))
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return false;
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return false;
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// Operand is an result from an ADD.
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// Operand is a result from an ADD.
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if (Addr.getOpcode() == ISD::ADD)
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if (Addr.getOpcode() == ISD::ADD)
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{
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{
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if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))
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if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))
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@ -42,6 +42,7 @@ getTargetNodeName(unsigned Opcode) const
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case MipsISD::Hi : return "MipsISD::Hi";
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case MipsISD::Hi : return "MipsISD::Hi";
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case MipsISD::Lo : return "MipsISD::Lo";
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case MipsISD::Lo : return "MipsISD::Lo";
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case MipsISD::Ret : return "MipsISD::Ret";
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case MipsISD::Ret : return "MipsISD::Ret";
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case MipsISD::Add : return "MipsISD::Add";
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default : return NULL;
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default : return NULL;
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}
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}
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}
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}
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@ -119,7 +120,6 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG)
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case ISD::RET: return LowerRET(Op, DAG);
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case ISD::RET: return LowerRET(Op, DAG);
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case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
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case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
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case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
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case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
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case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG);
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}
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}
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return SDOperand();
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return SDOperand();
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}
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}
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@ -140,17 +140,6 @@ AddLiveIn(MachineFunction &MF, unsigned PReg, TargetRegisterClass *RC)
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return VReg;
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return VReg;
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}
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}
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// Set up a frame object for the return address.
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//SDOperand MipsTargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) {
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// if (ReturnAddrIndex == 0) {
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// MachineFunction &MF = DAG.getMachineFunction();
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// ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(4, 0);
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// }
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//
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// return DAG.getFrameIndex(ReturnAddrIndex, getPointerTy());
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//}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Misc Lower Operation implementation
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// Misc Lower Operation implementation
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -160,10 +149,15 @@ LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG)
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GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
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GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
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SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
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SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
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SDOperand Hi = DAG.getNode(MipsISD::Hi, MVT::i32, GA);
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const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::i32, MVT::Flag);
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SDOperand Ops[] = { GA };
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SDOperand Hi = DAG.getNode(MipsISD::Hi, VTs, 2, Ops, 1);
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SDOperand Lo = DAG.getNode(MipsISD::Lo, MVT::i32, GA);
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SDOperand Lo = DAG.getNode(MipsISD::Lo, MVT::i32, GA);
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return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi);
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SDOperand InFlag = Hi.getValue(1);
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return DAG.getNode(MipsISD::Add, MVT::i32, Lo, Hi, InFlag);
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}
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}
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SDOperand MipsTargetLowering::
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SDOperand MipsTargetLowering::
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@ -370,8 +364,8 @@ LowerCallResult(SDOperand Chain, SDOperand InFlag, SDNode *TheCall,
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SmallVector<SDOperand, 8> ResultVals;
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SmallVector<SDOperand, 8> ResultVals;
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// Returns void
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// Returns void
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if (!RVLocs.size())
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//if (!RVLocs.size())
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return Chain.Val;
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// return Chain.Val;
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// Copy all of the result registers out of their specified physreg.
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// Copy all of the result registers out of their specified physreg.
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for (unsigned i = 0; i != RVLocs.size(); ++i) {
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for (unsigned i = 0; i != RVLocs.size(); ++i) {
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