From 80443f914624098db7088d751efbb8dae7743b76 Mon Sep 17 00:00:00 2001 From: Sean Callanan Date: Wed, 24 Feb 2010 02:56:25 +0000 Subject: [PATCH] Changed the table generator so that the X86 disassembler never recognizes InitReg instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97017 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/X86RecognizableInstr.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index 3843e56d985..ea78d4193ea 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -282,6 +282,10 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const { IsCodeGenOnly) return FILTER_STRONG; + if (Form == X86Local::MRMInitReg) + return FILTER_STRONG; + + // Filter out instructions with a LOCK prefix; // prefer forms that do not have the prefix if (HasLockPrefix) @@ -353,9 +357,6 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const { if (AsmString.find("subreg") != AsmString.npos) return FILTER_STRONG; - assert(Form != X86Local::MRMInitReg && - "FORMAT_MRMINITREG instruction not skipped"); - if (HasFROperands && Name.find("MOV") != Name.npos && ((Name.find("2") != Name.npos && Name.find("32") == Name.npos) || (Name.find("to") != Name.npos)))