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Don't require pseudo-instructions to carry encoding information.
For now this is distinct from isCodeGenOnly, as code-gen-only instructions can (and often do) still have encoding information associated with them. Once we've migrated all of them over to true pseudo-instructions that are lowered to real instructions prior to the printer/emitter, we can remove isCodeGenOnly and just use isPseudo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134539 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1225,14 +1225,14 @@ bool FixedLenDecoderEmitter::populateInstruction(const CodeGenInstruction &CGI,
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//
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// This also removes pseudo instructions from considerations of disassembly,
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// which is a better design and less fragile than the name matchings.
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BitsInit &Bits = getBitsField(Def, "Inst");
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if (Bits.allInComplete()) return false;
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// Ignore "asm parser only" instructions.
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if (Def.getValueAsBit("isAsmParserOnly") ||
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Def.getValueAsBit("isCodeGenOnly"))
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return false;
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BitsInit &Bits = getBitsField(Def, "Inst");
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if (Bits.allInComplete()) return false;
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std::vector<OperandInfo> InsnOperands;
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// If the instruction has specified a custom decoding hook, use that instead
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@ -1354,7 +1354,8 @@ bool FixedLenDecoderEmitter::populateInstruction(const CodeGenInstruction &CGI,
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void FixedLenDecoderEmitter::populateInstructions() {
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for (unsigned i = 0, e = NumberedInstructions.size(); i < e; ++i) {
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Record *R = NumberedInstructions[i]->TheDef;
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if (R->getValueAsString("Namespace") == "TargetOpcode")
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if (R->getValueAsString("Namespace") == "TargetOpcode" ||
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R->getValueAsBit("isPseudo"))
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continue;
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if (populateInstruction(*NumberedInstructions[i], i))
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