From 807111a8f434293f84bbd1171a953197e40819d1 Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Mon, 6 Oct 2014 20:19:47 +0000 Subject: [PATCH] [DAGCombine] Remove SIGN_EXTEND-related inf-loop The patch's author points out that, despite the function's documentation, getSetCCResultType is only used to get the SETCC result type (with one here-removed problematic exception). In one case, getSetCCResultType was being used to get the predicate type to use for a SELECT node, and then SIGN_EXTENDing (or truncating) to get the input predicate to match that type. Unfortunately, this was happening inside visitSIGN_EXTEND, and creating new SIGN_EXTEND nodes was causing an infinite loop. In addition, this behavior was wrong if a target was not using ZeroOrNegativeOneBooleanContent. Lastly, the extension/truncation seems unnecessary here: SELECT is defined as: Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not i1 then the high bits must conform to getBooleanContents. So here we remove this use of getSetCCResultType and update getSetCCResultType's documentation to reflect its actual uses. Patch by deadal nix! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219141 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetLowering.h | 5 +--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 8 ++---- test/CodeGen/X86/sext-i1.ll | 33 ++++++++++++++++++++++++ 3 files changed, 36 insertions(+), 10 deletions(-) diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index fa7ac953752..774e7d8ac8f 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -275,10 +275,7 @@ public: return false; } - /// Return the ValueType of the result of SETCC operations. Also used to - /// obtain the target's preferred type for the condition operand of SELECT and - /// BRCOND nodes. In the case of BRCOND the argument passed is MVT::Other - /// since there are no other operands to get a type hint from. + /// Return the ValueType of the result of SETCC operations. virtual EVT getSetCCResultType(LLVMContext &Context, EVT VT) const; /// Return the ValueType for comparison libcalls. Comparions libcalls include diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index f98ef96780f..074068e9748 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -5208,14 +5208,10 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) { if (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, SetCCVT)) { SDLoc DL(N); ISD::CondCode CC = cast(N0.getOperand(2))->get(); - SDValue SetCC = DAG.getSetCC(DL, - SetCCVT, + SDValue SetCC = DAG.getSetCC(DL, SetCCVT, N0.getOperand(0), N0.getOperand(1), CC); - EVT SelectVT = getSetCCResultType(VT); - return DAG.getSelect(DL, VT, - DAG.getSExtOrTrunc(SetCC, DL, SelectVT), + return DAG.getSelect(DL, VT, SetCC, NegOne, DAG.getConstant(0, VT)); - } } } diff --git a/test/CodeGen/X86/sext-i1.ll b/test/CodeGen/X86/sext-i1.ll index 64de0aee70d..1a575db11b8 100644 --- a/test/CodeGen/X86/sext-i1.ll +++ b/test/CodeGen/X86/sext-i1.ll @@ -61,3 +61,36 @@ if.end: ; preds = %if.then, %entry %xor27 = xor i32 undef, %cond ; [#uses=0] ret i32 0 } + +define i32 @t4(i64 %x) nounwind readnone ssp { +entry: +; 32-LABEL: t4: +; 32: movl +; 32: orl +; 32: movl +; 32: je +; 32: xorl + +; 64-LABEL: t4: +; 64: cmpq $1 +; 64: sbbl + %0 = icmp eq i64 %x, 0 + %1 = sext i1 %0 to i32 + ret i32 %1 +} + +define i64 @t5(i32 %x) nounwind readnone ssp { +entry: +; 32-LABEL: t5: +; 32: cmpl $1 +; 32: sbbl +; 32: movl + +; 64-LABEL: t5: +; 64: cmpl $1 +; 64: sbbq + %0 = icmp eq i32 %x, 0 + %1 = sext i1 %0 to i64 + ret i64 %1 +} +