Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since

AnalyzeBranch doesn't change the successor, just the order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145779 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Venkatraman Govindaraju 2011-12-03 21:24:48 +00:00
parent a86bfc1071
commit 80b1ae9292
2 changed files with 26 additions and 1 deletions

View File

@ -195,7 +195,7 @@ bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
.addMBB(UnCondBrIter->getOperand(0).getMBB()).addImm(BranchCode);
BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(SP::BA))
.addMBB(TargetBB);
MBB.addSuccessor(TargetBB);
OldInst->eraseFromParent();
UnCondBrIter->eraseFromParent();

View File

@ -0,0 +1,25 @@
; RUN: llc -march=sparc <%s
define void @foo(i32 %a) nounwind {
entry:
br i1 undef, label %return, label %else.0
else.0:
br i1 undef, label %if.end.0, label %return
if.end.0:
br i1 undef, label %if.then.1, label %else.1
else.1:
%0 = bitcast i8* undef to i8**
br label %else.1.2
if.then.1:
br i1 undef, label %return, label %return
else.1.2:
br i1 undef, label %return, label %return
return:
ret void
}