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Revert " mips32 long long register inline asm constraint support." as

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it appears to be breaking the bots.

This reverts commit 1b055ce320.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159619 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2012-07-02 23:22:25 +00:00
parent c723eb1aef
commit 80c1b38eff
2 changed files with 0 additions and 8 deletions
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2
lib/Target/Mips/MipsISelLowering.cpp
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@ -3355,8 +3355,6 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const
case 'r':
if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8)
return std::make_pair(0U, &Mips::CPURegsRegClass);
if (VT == MVT::i64 && !HasMips64)
return std::make_pair(0U, &Mips::CPURegsRegClass);
if (VT == MVT::i64 && HasMips64)
return std::make_pair(0U, &Mips::CPU64RegsRegClass);
// This will generate an error message

6
test/CodeGen/Mips/inlineasm-operand-code.ll
View File

@ -41,11 +41,5 @@ entry:
;CHECK: #NO_APP
tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
; a long long in 32 bit mode (use to assert)
;CHECK: #APP
;CHECK: addi ${{[0-9]+}},${{[0-9]+}},3
;CHECK: #NO_APP
tail call i64 asm sideeffect "addi $0,$1,$2 \0A\09", "=r,r,X"(i64 1229801703532086340, i64 3) nounwind
ret i32 0
}