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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-18 12:29:21 +00:00
Added gross hacks such as creating my own def-use map, and picking on Instruction that I can add all my TmpInstructions to its MCFI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17441 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -137,6 +137,33 @@ bool ModuloSchedulingPass::runOnFunction(Function &F) {
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if(MachineBBisValid(BI))
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Worklist.push_back(&*BI);
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defaultInst = 0;
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//If we have a basic block to schedule, create our def map
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if(Worklist.size() > 0) {
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for(MachineFunction::iterator BI = MF.begin(); BI != MF.end(); ++BI) {
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for(MachineBasicBlock::iterator I = BI->begin(), E = BI->end(); I != E; ++I) {
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for(unsigned opNum = 0; opNum < I->getNumOperands(); ++opNum) {
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const MachineOperand &mOp = I->getOperand(opNum);
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if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) {
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defMap[mOp.getVRegValue()] = &*I;
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}
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//See if we can use this Value* as our defaultInst
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if(!defaultInst && mOp.getType() == MachineOperand::MO_VirtualRegister) {
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Value *V = mOp.getVRegValue();
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if(!isa<TmpInstruction>(V) && !isa<Argument>(V) && !isa<Constant>(V))
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defaultInst = (Instruction*) V;
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}
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}
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}
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}
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}
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assert(defaultInst && "We must have a default instruction to use as our main point to add to machine code for instruction\n");
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DEBUG(std::cerr << "Default Instruction: " << *defaultInst << "\n");
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DEBUG(if(Worklist.size() == 0) std::cerr << "No single basic block loops in function to ModuloSchedule\n");
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//Iterate over the worklist and perform scheduling
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@ -265,7 +292,6 @@ bool ModuloSchedulingPass::MachineBBisValid(const MachineBasicBlock *BI) {
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MachineOpCode OC = I->getOpcode();
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if(TMI->isCall(OC))
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return false;
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}
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return true;
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}
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@ -1286,8 +1312,8 @@ void ModuloSchedulingPass::writePrologues(std::vector<MachineBasicBlock *> &prol
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//Save copy in tmpInstruction
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tmp = new TmpInstruction(mOp.getVRegValue());
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//Get machine code for this instruction
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get((Instruction*) mOp.getVRegValue());
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//Add TmpInstruction to safe LLVM Instruction MCFI
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst);
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tempMvec.addTemp((Value*) tmp);
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DEBUG(std::cerr << "Value: " << *(mOp.getVRegValue()) << " New Value: " << *tmp << " Stage: " << i << "\n");
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@ -1405,7 +1431,7 @@ void ModuloSchedulingPass::writeEpilogues(std::vector<MachineBasicBlock *> &epil
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Instruction *tmp = new TmpInstruction(newValues[mOp.getVRegValue()][i]);
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//Get machine code for this instruction
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get((Instruction*) mOp.getVRegValue());
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst);
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tempMvec.addTemp((Value*) tmp);
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MachineInstr *saveValue = BuildMI(machineBB, V9::PHI, 3).addReg(newValues[mOp.getVRegValue()][i]).addReg(kernelPHIs[mOp.getVRegValue()][i]).addRegDef(tmp);
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@ -1479,7 +1505,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma
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TmpInstruction *tmp = new TmpInstruction(mOp.getVRegValue());
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//Get machine code for this instruction
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get((Instruction*) mOp.getVRegValue());
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst);
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tempMvec.addTemp((Value*) tmp);
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//Update the operand in the cloned instruction
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@ -1498,7 +1524,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma
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TmpInstruction *tmp = new TmpInstruction(mOp.getVRegValue());
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//Get machine code for this instruction
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MachineCodeForInstruction & tempVec = MachineCodeForInstruction::get((Instruction*) mOp.getVRegValue());
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MachineCodeForInstruction & tempVec = MachineCodeForInstruction::get(defaultInst);
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tempVec.addTemp((Value*) tmp);
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//Create new machine instr and put in MBB
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@ -1554,7 +1580,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma
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lastPhi = new TmpInstruction(I->second);
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//Get machine code for this instruction
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get((Instruction*) V->first);
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst);
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tempMvec.addTemp((Value*) lastPhi);
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MachineInstr *saveValue = BuildMI(*machineBB, machineBB->begin(), V9::PHI, 3).addReg(kernelValue[V->first]).addReg(I->second).addRegDef(lastPhi);
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@ -1565,7 +1591,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma
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Instruction *tmp = new TmpInstruction(I->second);
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//Get machine code for this instruction
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get((Instruction*) V->first);
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst);
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tempMvec.addTemp((Value*) tmp);
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@ -1612,6 +1638,7 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect
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//Start with the kernel and for each phi insert a copy for the phi def and for each arg
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for(MachineBasicBlock::iterator I = kernelBB->begin(), E = kernelBB->end(); I != E; ++I) {
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DEBUG(std::cerr << "Looking at Instr: " << *I << "\n");
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//Get op code and check if its a phi
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if(I->getOpcode() == V9::PHI) {
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@ -1659,34 +1686,24 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect
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}
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else {
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//We found an instruction that we can add to its mcfi
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if(addToMCFI.size() > 0) {
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for(unsigned i = 0; i < I->getNumOperands(); ++i) {
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const MachineOperand &mOp = I->getOperand(i);
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if(mOp.getType() == MachineOperand::MO_VirtualRegister) {
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if(!isa<TmpInstruction>(mOp.getVRegValue()) && !isa<PHINode>(mOp.getVRegValue())) {
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//Get machine code for this instruction
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get((Instruction*) mOp.getVRegValue());
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for(unsigned x = 0; x < addToMCFI.size(); ++x) {
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tempMvec.addTemp(addToMCFI[x]);
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}
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addToMCFI.clear();
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break;
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}
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}
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}
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}
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}
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}
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//for(std::vector<std::pair<Instruction*, Value*> >::reverse_iterator I = newORs.rbegin(), IE = newORs.rend(); I != IE; ++I)
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//BuildMI(*kernelBB, kernelBB->begin(), V9::ORr, 3).addReg(I->first).addImm(0).addRegDef(I->second);
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//Add TmpInstructions to some MCFI
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if(addToMCFI.size() > 0) {
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst);
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for(unsigned x = 0; x < addToMCFI.size(); ++x) {
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tempMvec.addTemp(addToMCFI[x]);
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}
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addToMCFI.clear();
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}
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//Remove phis from epilogue
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for(std::vector<MachineBasicBlock*>::iterator MB = epilogues.begin(), ME = epilogues.end(); MB != ME; ++MB) {
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for(MachineBasicBlock::iterator I = (*MB)->begin(), E = (*MB)->end(); I != E; ++I) {
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DEBUG(std::cerr << "Looking at Instr: " << *I << "\n");
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//Get op code and check if its a phi
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if(I->getOpcode() == V9::PHI) {
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Instruction *tmp = 0;
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@ -1730,29 +1747,19 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect
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}
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}
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else {
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//We found an instruction that we can add to its mcfi
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if(addToMCFI.size() > 0) {
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for(unsigned i = 0; i < I->getNumOperands(); ++i) {
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const MachineOperand &mOp = I->getOperand(i);
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if(mOp.getType() == MachineOperand::MO_VirtualRegister) {
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if(!isa<TmpInstruction>(mOp.getVRegValue()) && !isa<PHINode>(mOp.getVRegValue())) {
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//Get machine code for this instruction
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get((Instruction*) mOp.getVRegValue());
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for(unsigned x = 0; x < addToMCFI.size(); ++x) {
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tempMvec.addTemp(addToMCFI[x]);
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}
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addToMCFI.clear();
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break;
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}
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}
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}
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}
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}
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}
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}
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if(addToMCFI.size() > 0) {
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst);
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for(unsigned x = 0; x < addToMCFI.size(); ++x) {
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tempMvec.addTemp(addToMCFI[x]);
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}
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addToMCFI.clear();
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}
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//Delete the phis
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for(std::vector<std::pair<MachineBasicBlock*, MachineBasicBlock::iterator> >::iterator I = worklist.begin(), E = worklist.end(); I != E; ++I) {
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@ -1795,6 +1802,9 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) {
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//find the value in the map
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if (const Value* srcI = mOp.getVRegValue()) {
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if(isa<Constant>(srcI) || isa<Argument>(srcI))
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continue;
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//Before we declare this Value* one that we should save
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//make sure its def is not of the same stage as this instruction
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//because it will be consumed before its used
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@ -1803,28 +1813,15 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) {
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//Should we save this value?
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bool save = true;
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//Get Machine code for this instruction, and loop backwards over the array
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//to find the def
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MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defInst);
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for (int j = tempMvec.size()-1; j >= 0; j--) {
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MachineInstr *temp = tempMvec[j];
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//Loop over instructions
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for(unsigned opNum = 0; opNum < temp->getNumOperands(); ++opNum) {
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MachineOperand &mDefOp = temp->getOperand(opNum);
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if (mDefOp.getType() == MachineOperand::MO_VirtualRegister && mDefOp.isDef()) {
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const Value* defVReg = mDefOp.getVRegValue();
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if(defVReg == srcI) {
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//Check if instruction has been seen already and is of same stage
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if(lastInstrs.count(temp)) {
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if(lastInstrs[temp] == I->second)
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save = false;
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}
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}
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}
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}
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//Assert if not in the def map
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assert(defMap.count(srcI) && "No entry for this Value* definition in our map");
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MachineInstr *defInstr = defMap[srcI];
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if(lastInstrs.count(defInstr)) {
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if(lastInstrs[defInstr] == I->second)
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save = false;
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}
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if(save)
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valuesToSave[srcI] = std::make_pair(I->first, i);
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}
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@ -39,6 +39,12 @@ namespace llvm {
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class ModuloSchedulingPass : public FunctionPass {
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const TargetMachine ⌖
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//Map to hold Value* defs
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std::map<const Value*, MachineInstr*> defMap;
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//LLVM Instruction we know we can add TmpInstructions to its MCFI
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Instruction *defaultInst;
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//Map that holds node to node attribute information
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std::map<MSchedGraphNode*, MSNodeAttributes> nodeToAttributesMap;
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