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ARM-BE: test files for vector argument passing

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Reviewed at http://reviews.llvm.org/D3766



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208793 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Christian Pirker 2014-05-14 16:59:44 +00:00
parent 62d6aa0252
commit 8101512a2d
3 changed files with 2543 additions and 1 deletions
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3
lib/Target/ARM/ARMISelLowering.cpp
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@ -3965,7 +3965,8 @@ static SDValue ExpandBITCAST(SDNode *N, SelectionDAG &DAG) {
// Turn f64->i64 into VMOVRRD.
if (DstVT == MVT::i64 && TLI.isTypeLegal(SrcVT)) {
SDValue Cvt;
if (TLI.isBigEndian() && SrcVT.isVector())
if (TLI.isBigEndian() && SrcVT.isVector() &&
SrcVT.getVectorNumElements() > 1)
Cvt = DAG.getNode(ARMISD::VMOVRRD, dl,
DAG.getVTList(MVT::i32, MVT::i32),
DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op));

1172
test/CodeGen/ARM/big-endian-vector-callee.ll Normal file
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1369
test/CodeGen/ARM/big-endian-vector-caller.ll Normal file
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