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ARM: fix B decoding

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183914 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Amaury de la Vieuville
2013-06-13 16:41:55 +00:00
parent 1290ce00a3
commit 8117ac555d
2 changed files with 3 additions and 1 deletions
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2
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@@ -2104,7 +2104,7 @@ DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
unsigned imm10 = fieldFromInstruction(Insn, 16, 10); unsigned imm10 = fieldFromInstruction(Insn, 16, 10);
unsigned imm11 = fieldFromInstruction(Insn, 0, 11); unsigned imm11 = fieldFromInstruction(Insn, 0, 11);
unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11; unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11;
int imm32 = SignExtend32<24>(tmp << 1); int imm32 = SignExtend32<25>(tmp << 1);
if (!tryAddingSymbolicOperand(Address, Address + imm32 + 4, if (!tryAddingSymbolicOperand(Address, Address + imm32 + 4,
true, 4, Inst, Decoder)) true, 4, Inst, Decoder))
Inst.addOperand(MCOperand::CreateImm(imm32)); Inst.addOperand(MCOperand::CreateImm(imm32));

2
test/MC/Disassembler/ARM/thumb2.txt
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@@ -170,8 +170,10 @@
0x13 0xf5 0xce 0xa9 0x13 0xf5 0xce 0xa9
# CHECK: b.w #208962 # CHECK: b.w #208962
# CHECK: b.w #-16777216
0x33 0xf0 0x21 0xb8 # rdar://12585795 0x33 0xf0 0x21 0xb8 # rdar://12585795
0x00 0xf4 0x00 0x90
#------------------------------------------------------------------------------ #------------------------------------------------------------------------------
# BFC # BFC