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[PowerPC] Add rldcr/rldic instructions

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This adds pattern for the rldcr and rldic instructions (the last instruction
from the rotate/shift family that were missing).  They are currently used
only by the asm parser.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184833 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ulrich Weigand
2013-06-25 13:17:10 +00:00
parent 9c52f81e17
commit 816c06f7fa
2 changed files with 16 additions and 4 deletions
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12
test/MC/PowerPC/ppc64-encoding.s
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@@ -444,14 +444,18 @@
rldicr 2, 3, 4, 5
# CHECK: rldicr. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x45]
rldicr. 2, 3, 4, 5
# FIXME: rldic 2, 3, 4, 5
# FIXME: rldic. 2, 3, 4, 5
# CHECK: rldic 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x48]
rldic 2, 3, 4, 5
# CHECK: rldic. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x49]
rldic. 2, 3, 4, 5
# CHECK: rldcl 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x50]
rldcl 2, 3, 4, 5
# CHECK: rldcl. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x51]
rldcl. 2, 3, 4, 5
# FIXME: rldcr 2, 3, 4, 5
# FIXME: rldcr. 2, 3, 4, 5
# CHECK: rldcr 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x52]
rldcr 2, 3, 4, 5
# CHECK: rldcr. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x53]
rldcr. 2, 3, 4, 5
# CHECK: rldimi 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x4c]
rldimi 2, 3, 4, 5
# CHECK: rldimi. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x4d]