mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-02 07:11:49 +00:00
Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148383 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
cd7f02bb43
commit
819026f2f8
@ -249,8 +249,10 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
|
||||
return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
|
||||
}
|
||||
case TargetLowering::TypeWidenVector:
|
||||
if (NOutVT.bitsEq(NInVT))
|
||||
// The input is widened to the same size. Convert to the widened value.
|
||||
// The input is widened to the same size. Convert to the widened value.
|
||||
// Make sure that the outgoing value is not a vector, because this would
|
||||
// make us bitcast between two vectors which are legalized in different ways.
|
||||
if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector())
|
||||
return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
|
||||
}
|
||||
|
||||
|
14
test/CodeGen/X86/2012-01-18-vbitcast.ll
Normal file
14
test/CodeGen/X86/2012-01-18-vbitcast.ll
Normal file
@ -0,0 +1,14 @@
|
||||
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s
|
||||
|
||||
;CHECK: vcast
|
||||
define <2 x i32> @vcast(<2 x float> %a, <2 x float> %b) {
|
||||
;CHECK: pshufd
|
||||
;CHECK: pshufd
|
||||
%af = bitcast <2 x float> %a to <2 x i32>
|
||||
%bf = bitcast <2 x float> %b to <2 x i32>
|
||||
%x = sub <2 x i32> %af, %bf
|
||||
;CHECK: psubq
|
||||
ret <2 x i32> %x
|
||||
;CHECK: ret
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user