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Cleaned up code layout, spacing, etc. for readability purposes and to be more

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consistent with the style of LLVM's code base (and itself! it's inconsistent in
some places.)

No functional changes were made.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6265 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2003-05-21 18:48:06 +00:00
parent 5a7a849403
commit 81b0686f09
2 changed files with 270 additions and 296 deletions
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69
lib/Target/SparcV9/SparcV9InstrInfo.cpp
View File

@ -97,8 +97,7 @@ CreateSETUWConst(const TargetMachine& target, uint32_t C,
bool smallNegValue =isSigned && sC < 0 && sC != -sC && -sC < (int32_t)MAXSIMM;
// Set the high 22 bits in dest if non-zero and simm13 field of OR not enough
if (!smallNegValue && (C & ~MAXLO) && C > MAXSIMM)
{
if (!smallNegValue && (C & ~MAXLO) && C > MAXSIMM) {
miSETHI = BuildMI(V9::SETHI, 2).addZImm(C).addRegDef(dest);
miSETHI->setOperandHi32(0);
mvec.push_back(miSETHI);
@ -106,15 +105,13 @@ CreateSETUWConst(const TargetMachine& target, uint32_t C,
// Set the low 10 or 12 bits in dest. This is necessary if no SETHI
// was generated, or if the low 10 bits are non-zero.
if (miSETHI==NULL || C & MAXLO)
{
if (miSETHI)
{ // unsigned value with high-order bits set using SETHI
if (miSETHI==NULL || C & MAXLO) {
if (miSETHI) {
// unsigned value with high-order bits set using SETHI
miOR = BuildMI(V9::OR,3).addReg(dest).addZImm(C).addRegDef(dest);
miOR->setOperandLo32(1);
}
else
{ // unsigned or small signed value that fits in simm13 field of OR
} else {
// unsigned or small signed value that fits in simm13 field of OR
assert(smallNegValue || (C & ~MAXSIMM) == 0);
miOR = BuildMI(V9::OR, 3).addMReg(target.getRegInfo()
.getZeroRegNum())
@ -266,13 +263,12 @@ CreateUIntSetInstruction(const TargetMachine& target,
static const uint64_t lo32 = (uint32_t) ~0;
if (C <= lo32) // High 32 bits are 0. Set low 32 bits.
CreateSETUWConst(target, (uint32_t) C, dest, mvec);
else if ((C & ~lo32) == ~lo32 && (C & (1 << 31)))
{ // All high 33 (not 32) bits are 1s: sign-extension will take care
else if ((C & ~lo32) == ~lo32 && (C & (1 << 31))) {
// All high 33 (not 32) bits are 1s: sign-extension will take care
// of high 32 bits, so use the sequence for signed int
CreateSETSWConst(target, (int32_t) C, dest, mvec);
}
else if (C > lo32)
{ // C does not fit in 32 bits
} else if (C > lo32) {
// C does not fit in 32 bits
TmpInstruction* tmpReg = new TmpInstruction(Type::IntTy);
mcfi.addTemp(tmpReg);
CreateSETXConst(target, C, tmpReg, dest, mvec);
@ -425,35 +421,29 @@ UltraSparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
if (isa<ConstantPointerRef>(val))
val = cast<ConstantPointerRef>(val)->getValue();
if (isa<GlobalValue>(val))
{
if (isa<GlobalValue>(val)) {
TmpInstruction* tmpReg =
new TmpInstruction(PointerType::get(val->getType()), val);
mcfi.addTemp(tmpReg);
CreateSETXLabel(target, val, tmpReg, dest, mvec);
}
else if (valType->isIntegral())
{
} else if (valType->isIntegral()) {
bool isValidConstant;
unsigned opSize = target.getTargetData().getTypeSize(val->getType());
unsigned destSize = target.getTargetData().getTypeSize(dest->getType());
if (! dest->getType()->isSigned())
{
if (! dest->getType()->isSigned()) {
uint64_t C = GetConstantValueAsUnsignedInt(val, isValidConstant);
assert(isValidConstant && "Unrecognized constant");
if (opSize > destSize || (val->getType()->isSigned() && destSize < 8))
{ // operand is larger than dest,
if (opSize > destSize || (val->getType()->isSigned() && destSize < 8)) {
// operand is larger than dest,
// OR both are equal but smaller than the full register size
// AND operand is signed, so it may have extra sign bits:
// mask high bits
C = C & ((1U << 8*destSize) - 1);
}
CreateUIntSetInstruction(target, C, dest, mvec, mcfi);
}
else
{
} else {
int64_t C = GetConstantValueAsSignedInt(val, isValidConstant);
assert(isValidConstant && "Unrecognized constant");
@ -470,9 +460,7 @@ UltraSparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
CreateIntSetInstruction(target, C, dest, mvec, mcfi);
}
}
else
{
} else {
// Make an instruction sequence to load the constant, viz:
// SETX <addr-of-constant>, tmpReg, addrReg
// LOAD /*addr*/ addrReg, /*offset*/ 0, dest
@ -535,8 +523,8 @@ UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
// Note that the store instruction is the same for signed and unsigned ints.
const Type* storeType = (srcSize <= 4)? Type::IntTy : Type::LongTy;
Value* storeVal = val;
if (srcSize < target.getTargetData().getTypeSize(Type::FloatTy))
{ // sign- or zero-extend respectively
if (srcSize < target.getTargetData().getTypeSize(Type::FloatTy)) {
// sign- or zero-extend respectively
storeVal = new TmpInstruction(storeType, val);
if (val->getType()->isSigned())
CreateSignExtensionInstructions(target, F, val, storeVal, 8*srcSize,
@ -622,8 +610,7 @@ UltraSparcInstrInfo::CreateCopyInstructionsByType(const TargetMachine& target,
const Type* resultType = dest->getType();
MachineOpCode opCode = ChooseAddInstructionByType(resultType);
if (opCode == V9::INVALID_OPCODE)
{
if (opCode == V9::INVALID_OPCODE) {
assert(0 && "Unsupported result type in CreateCopyInstructionsByType()");
return;
}
@ -632,8 +619,7 @@ UltraSparcInstrInfo::CreateCopyInstructionsByType(const TargetMachine& target,
// a global variable (i.e., a constant address), generate a load
// instruction instead of an add
//
if (isa<Constant>(src))
{
if (isa<Constant>(src)) {
unsigned int machineRegNum;
int64_t immedValue;
MachineOperand::MachineOperandType opType =
@ -646,14 +632,13 @@ UltraSparcInstrInfo::CreateCopyInstructionsByType(const TargetMachine& target,
else if (isa<GlobalValue>(src))
loadConstantToReg = true;
if (loadConstantToReg)
{ // `src' is constant and cannot fit in immed field for the ADD
if (loadConstantToReg) {
// `src' is constant and cannot fit in immed field for the ADD
// Insert instructions to "load" the constant into a register
target.getInstrInfo().CreateCodeToLoadConst(target, F, src, dest,
mvec, mcfi);
}
else
{ // Create an add-with-0 instruction of the appropriate type.
} else {
// Create an add-with-0 instruction of the appropriate type.
// Make `src' the second operand, in case it is a constant
// Use (unsigned long) 0 for a NULL pointer value.
//
@ -682,8 +667,8 @@ CreateBitExtensionInstructions(bool signExtend,
assert(numLowBits <= 32 && "Otherwise, nothing should be done here!");
if (numLowBits < 32)
{ // SLL is needed since operand size is < 32 bits.
if (numLowBits < 32) {
// SLL is needed since operand size is < 32 bits.
TmpInstruction *tmpI = new TmpInstruction(destVal->getType(),
srcVal, destVal, "make32");
mcfi.addTemp(tmpI);

51
lib/Target/SparcV9/SparcV9InstrSelection.cpp
View File

@ -121,8 +121,8 @@ FoldGetElemChain(InstrTreeNode* ptrNode, std::vector<Value*>& chainIdxVec,
for (OI = firstIdx; allConstantOffsets && OI != lastIdx; ++OI)
allConstantOffsets = isa<ConstantInt>(*OI);
if (allConstantOffsets)
{ // Get pointer value out of ptrChild.
if (allConstantOffsets) {
// Get pointer value out of ptrChild.
ptrVal = gepInst->getPointerOperand();
// Remember if it has leading zero index: it will be discarded later.
@ -137,8 +137,7 @@ FoldGetElemChain(InstrTreeNode* ptrNode, std::vector<Value*>& chainIdxVec,
// Get the previous GEP instruction and continue trying to fold
ptrChild = dyn_cast<InstructionNode>(ptrChild->leftChild());
}
else // cannot fold this getElementPtr instr. or any preceding ones
} else // cannot fold this getElementPtr instr. or any preceding ones
break;
}
@ -186,8 +185,7 @@ GetGEPInstArgs(InstructionNode* gepNode,
bool foldedGEPs = false;
bool leadingNonZeroIdx = gepI && ! IsZero(*gepI->idx_begin());
if (allConstantIndices)
if (Value* newPtr = FoldGetElemChain(ptrChild, idxVec, leadingNonZeroIdx))
{
if (Value* newPtr = FoldGetElemChain(ptrChild, idxVec, leadingNonZeroIdx)) {
ptrVal = newPtr;
foldedGEPs = true;
}
@ -242,8 +240,8 @@ GetMemInstArgs(InstructionNode* memInstrNode,
InstructionNode* gepNode = NULL;
if (isa<GetElementPtrInst>(memInst))
gepNode = memInstrNode;
else if (isa<InstructionNode>(ptrChild) && isa<GetElementPtrInst>(ptrVal))
{ // Child of load/store is a GEP and memInst is its only use.
else if (isa<InstructionNode>(ptrChild) && isa<GetElementPtrInst>(ptrVal)) {
// Child of load/store is a GEP and memInst is its only use.
// Use its indices and mark it as folded.
gepNode = cast<InstructionNode>(ptrChild);
gepNode->markFoldedIntoParent();
@ -293,8 +291,7 @@ ChooseBpccInstruction(const InstructionNode* instrNode,
bool isSigned = setCCInstr->getOperand(0)->getType()->isSigned();
if (isSigned)
{
if (isSigned) {
switch(setCCInstr->getOpcode())
{
case Instruction::SetEQ: opCode = V9::BE; break;
@ -307,9 +304,7 @@ ChooseBpccInstruction(const InstructionNode* instrNode,
assert(0 && "Unrecognized VM instruction!");
break;
}
}
else
{
} else {
switch(setCCInstr->getOpcode())
{
case Instruction::SetEQ: opCode = V9::BE; break;
@ -367,8 +362,7 @@ GetTmpForCC(Value* boolVal, const Function *F, const Type* ccType)
assert(boolVal->getType() == Type::BoolTy && "Weird but ok! Delete assert");
if (lastFunction != F)
{
if (lastFunction != F) {
lastFunction = F;
boolToTmpCache.clear();
}
@ -462,7 +456,8 @@ ChooseConvertToFloatInstr(OpLabel vopCode, const Type* opType)
switch(vopCode)
{
case ToFloatTy:
if (opType == Type::SByteTy || opType == Type::ShortTy || opType == Type::IntTy)
if (opType == Type::SByteTy || opType == Type::ShortTy ||
opType == Type::IntTy)
opCode = V9::FITOS;
else if (opType == Type::LongTy)
opCode = V9::FXTOS;
@ -507,21 +502,16 @@ ChooseConvertFPToIntInstr(Type::PrimitiveID tid, const Type* opType)
assert((opType == Type::FloatTy || opType == Type::DoubleTy)
&& "This function should only be called for FLOAT or DOUBLE");
if (tid==Type::UIntTyID)
{
if (tid == Type::UIntTyID) {
assert(tid != Type::UIntTyID && "FP-to-uint conversions must be expanded"
" into FP->long->uint for SPARC v9: SO RUN PRESELECTION PASS!");
}
else if (tid==Type::SByteTyID || tid==Type::ShortTyID || tid==Type::IntTyID ||
tid==Type::UByteTyID || tid==Type::UShortTyID)
{
} else if (tid == Type::SByteTyID || tid == Type::ShortTyID ||
tid == Type::IntTyID || tid == Type::UByteTyID ||
tid == Type::UShortTyID) {
opCode = (opType == Type::FloatTy)? V9::FSTOI : V9::FDTOI;
}
else if (tid==Type::LongTyID || tid==Type::ULongTyID)
{
} else if (tid == Type::LongTyID || tid == Type::ULongTyID) {
opCode = (opType == Type::FloatTy)? V9::FSTOX : V9::FDTOX;
}
else
} else
assert(0 && "Should not get here, Mo!");
return opCode;
@ -626,17 +616,16 @@ ChooseSubInstructionByType(const Type* resultType)
{
MachineOpCode opCode = V9::INVALID_OPCODE;
if (resultType->isInteger() || isa<PointerType>(resultType))
{
if (resultType->isInteger() || isa<PointerType>(resultType)) {
opCode = V9::SUB;
}
else
} else {
switch(resultType->getPrimitiveID())
{
case Type::FloatTyID: opCode = V9::FSUBS; break;
case Type::DoubleTyID: opCode = V9::FSUBD; break;
default: assert(0 && "Invalid type for SUB instruction"); break;
}
}
return opCode;
}