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Revert r123908; the code in question is completely untested and wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126964 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1051,8 +1051,6 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
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case ISD::SSUBO: ExpandIntRes_SADDSUBO(N, Lo, Hi); break;
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case ISD::UADDO:
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case ISD::USUBO: ExpandIntRes_UADDSUBO(N, Lo, Hi); break;
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case ISD::UMULO:
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case ISD::SMULO: ExpandIntRes_UMULSMULO(N, Lo, Hi); break;
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}
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// If Lo/Hi is null, the sub-method took care of registering results etc.
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@ -2128,31 +2126,6 @@ void DAGTypeLegalizer::ExpandIntRes_UADDSUBO(SDNode *N,
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ReplaceValueWith(SDValue(N, 1), Ofl);
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}
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void DAGTypeLegalizer::ExpandIntRes_UMULSMULO(SDNode *N,
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SDValue &Lo, SDValue &Hi) {
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SDValue LHS = N->getOperand(0);
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SDValue RHS = N->getOperand(1);
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DebugLoc dl = N->getDebugLoc();
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EVT VT = N->getValueType(0);
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EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits() / 2);
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// Expand the result by simply replacing it with the equivalent
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// non-overflow-checking operation.
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SDValue Ret = DAG.getNode(ISD::MUL, dl, LHS.getValueType(), LHS, RHS);
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SplitInteger(Ret, Lo, Hi);
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// Now calculate overflow.
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SDValue Ofl;
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if (N->getOpcode() == ISD::UMULO)
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Ofl = DAG.getSetCC(dl, N->getValueType(1), Hi,
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DAG.getConstant(0, VT), ISD::SETNE);
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else {
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SDValue Tmp = DAG.getConstant(VT.getSizeInBits() - 1, HalfVT);
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Tmp = DAG.getNode(ISD::SRA, dl, HalfVT, Lo, Tmp);
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Ofl = DAG.getSetCC(dl, N->getValueType(1), Hi, Tmp, ISD::SETNE);
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}
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ReplaceValueWith(SDValue(N, 1), Ofl);
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}
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void DAGTypeLegalizer::ExpandIntRes_UDIV(SDNode *N,
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SDValue &Lo, SDValue &Hi) {
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EVT VT = N->getValueType(0);
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@ -348,7 +348,6 @@ private:
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void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
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void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
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void ExpandIntRes_UMULSMULO (SDNode *N, SDValue &Lo, SDValue &Hi);
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void ExpandShiftByConstant(SDNode *N, unsigned Amt,
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SDValue &Lo, SDValue &Hi);
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@ -1,28 +0,0 @@
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; RUN: llc < %s -mtriple=i386-apple-darwin
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%0 = type { i64, i1 }
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define i32 @f0(i64 %a, i64 %b) nounwind ssp {
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%1 = alloca i64, align 4
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%2 = alloca i64, align 4
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store i64 %a, i64* %1, align 8
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store i64 %b, i64* %2, align 8
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%3 = load i64* %1, align 8
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%4 = load i64* %2, align 8
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%5 = call %0 @llvm.smul.with.overflow.i64(i64 %3, i64 %4)
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%6 = extractvalue %0 %5, 0
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%7 = extractvalue %0 %5, 1
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br i1 %7, label %8, label %9
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; <label>:8 ; preds = %0
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call void @llvm.trap()
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unreachable
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; <label>:9 ; preds = %0
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%10 = trunc i64 %6 to i32
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ret i32 %10
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}
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declare %0 @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
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declare void @llvm.trap() nounwind
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