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Revert r123908; the code in question is completely untested and wrong.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126964 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2011-03-03 22:33:23 +00:00
parent ea83b13350
commit 81c5ef8649
3 changed files with 0 additions and 56 deletions
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27
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@ -1051,8 +1051,6 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
case ISD::SSUBO: ExpandIntRes_SADDSUBO(N, Lo, Hi); break; case ISD::SSUBO: ExpandIntRes_SADDSUBO(N, Lo, Hi); break;
case ISD::UADDO: case ISD::UADDO:
case ISD::USUBO: ExpandIntRes_UADDSUBO(N, Lo, Hi); break; case ISD::USUBO: ExpandIntRes_UADDSUBO(N, Lo, Hi); break;
case ISD::UMULO:
case ISD::SMULO: ExpandIntRes_UMULSMULO(N, Lo, Hi); break;
} }
// If Lo/Hi is null, the sub-method took care of registering results etc. // If Lo/Hi is null, the sub-method took care of registering results etc.
@ -2128,31 +2126,6 @@ void DAGTypeLegalizer::ExpandIntRes_UADDSUBO(SDNode *N,
ReplaceValueWith(SDValue(N, 1), Ofl); ReplaceValueWith(SDValue(N, 1), Ofl);
} }
void DAGTypeLegalizer::ExpandIntRes_UMULSMULO(SDNode *N,
SDValue &Lo, SDValue &Hi) {
SDValue LHS = N->getOperand(0);
SDValue RHS = N->getOperand(1);
DebugLoc dl = N->getDebugLoc();
EVT VT = N->getValueType(0);
EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits() / 2);
// Expand the result by simply replacing it with the equivalent
// non-overflow-checking operation.
SDValue Ret = DAG.getNode(ISD::MUL, dl, LHS.getValueType(), LHS, RHS);
SplitInteger(Ret, Lo, Hi);
// Now calculate overflow.
SDValue Ofl;
if (N->getOpcode() == ISD::UMULO)
Ofl = DAG.getSetCC(dl, N->getValueType(1), Hi,
DAG.getConstant(0, VT), ISD::SETNE);
else {
SDValue Tmp = DAG.getConstant(VT.getSizeInBits() - 1, HalfVT);
Tmp = DAG.getNode(ISD::SRA, dl, HalfVT, Lo, Tmp);
Ofl = DAG.getSetCC(dl, N->getValueType(1), Hi, Tmp, ISD::SETNE);
}
ReplaceValueWith(SDValue(N, 1), Ofl);
}
void DAGTypeLegalizer::ExpandIntRes_UDIV(SDNode *N, void DAGTypeLegalizer::ExpandIntRes_UDIV(SDNode *N,
SDValue &Lo, SDValue &Hi) { SDValue &Lo, SDValue &Hi) {
EVT VT = N->getValueType(0); EVT VT = N->getValueType(0);

1
lib/CodeGen/SelectionDAG/LegalizeTypes.h
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@ -348,7 +348,6 @@ private:
void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi); void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi); void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
void ExpandIntRes_UMULSMULO (SDNode *N, SDValue &Lo, SDValue &Hi);
void ExpandShiftByConstant(SDNode *N, unsigned Amt, void ExpandShiftByConstant(SDNode *N, unsigned Amt,
SDValue &Lo, SDValue &Hi); SDValue &Lo, SDValue &Hi);

28
test/CodeGen/X86/umulo-64.ll
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@ -1,28 +0,0 @@
; RUN: llc < %s -mtriple=i386-apple-darwin
%0 = type { i64, i1 }
define i32 @f0(i64 %a, i64 %b) nounwind ssp {
%1 = alloca i64, align 4
%2 = alloca i64, align 4
store i64 %a, i64* %1, align 8
store i64 %b, i64* %2, align 8
%3 = load i64* %1, align 8
%4 = load i64* %2, align 8
%5 = call %0 @llvm.smul.with.overflow.i64(i64 %3, i64 %4)
%6 = extractvalue %0 %5, 0
%7 = extractvalue %0 %5, 1
br i1 %7, label %8, label %9
; <label>:8 ; preds = %0
call void @llvm.trap()
unreachable
; <label>:9 ; preds = %0
%10 = trunc i64 %6 to i32
ret i32 %10
}
declare %0 @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
declare void @llvm.trap() nounwind