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synced 2024-12-13 04:30:23 +00:00
Convert a few tests to FileCheck for PR5307.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89584 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -6,8 +6,12 @@ define i32 @f1(i32 %a, i32 %b) {
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ret i32 %tmp1
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}
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; CHECK: bic r0, r0, r1
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define i32 @f2(i32 %a, i32 %b) {
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%tmp = xor i32 %b, 4294967295
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%tmp1 = and i32 %tmp, %a
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ret i32 %tmp1
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}
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; CHECK: bic r0, r0, r1
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@ -1,5 +1,4 @@
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; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | grep -E {vmov\\W*r\[0-9\]+,\\W*s\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | not grep fmrrd
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; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | FileCheck %s
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@i = weak global i32 0 ; <i32*> [#uses=2]
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@u = weak global i32 0 ; <i32*> [#uses=2]
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@ -45,3 +44,7 @@ define void @foo9(double %x) {
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store i16 %tmp, i16* null
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ret void
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}
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; CHECK: vmov d0, r0, r1
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; CHECK-NOT: fmrrd
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@ -1,6 +1,6 @@
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; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vsub.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vsub.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vsub.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
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; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
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; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
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; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
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define float @test(float %a, float %b) {
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entry:
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@ -8,3 +8,6 @@ entry:
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ret float %0
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}
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; VFP2: vsub.f32 s0, s1, s0
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; NFP1: vsub.f32 d0, d1, d0
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; NFP0: vsub.f32 s0, s1, s0
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=arm -mattr=+v6t2 | grep {mls\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
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; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
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define i32 @f1(i32 %a, i32 %b, i32 %c) {
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%tmp1 = mul i32 %a, %b
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@ -12,3 +12,5 @@ define i32 @f2(i32 %a, i32 %b, i32 %c) {
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%tmp2 = sub i32 %tmp1, %c
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ret i32 %tmp2
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}
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; CHECK: mls r0, r0, r1, r2
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=pic16 | grep {movf \\+@i + 0, \\+W}
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; RUN: llc < %s -march=pic16 | FileCheck %s
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target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-f32:32:32"
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target triple = "pic16-"
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@ -27,3 +27,5 @@ entry:
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store i8 %conv8, i8* %tmp9
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ret void
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}
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; CHECK: movf @i + 0, W
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@ -1,11 +1,6 @@
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; RUN: llc < %s -march=ppc32 | \
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; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4
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; RUN: llc < %s -march=ppc32 | not grep rlwinm
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; RUN: llc < %s -march=ppc32 | not grep rlwimi
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; RUN: llc < %s -march=ppc64 | \
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; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4
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; RUN: llc < %s -march=ppc64 | not grep rlwinm
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; RUN: llc < %s -march=ppc64 | not grep rlwimi
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; RUN: llc < %s -march=ppc32 | FileCheck %s -check-prefix=X32
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; RUN: llc < %s -march=ppc64 | FileCheck %s -check-prefix=X64
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define void @STWBRX(i32 %i, i8* %ptr, i32 %off) {
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%tmp1 = getelementptr i8* %ptr, i32 %off ; <i8*> [#uses=1]
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@ -43,3 +38,18 @@ declare i32 @llvm.bswap.i32(i32)
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declare i16 @llvm.bswap.i16(i16)
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; X32: stwbrx 3, 4, 5
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; X32: lwbrx 3, 3, 4
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; X32: sthbrx 3, 4, 5
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; X32: lhbrx 3, 3, 4
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; X32-NOT: rlwinm
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; X32-NOT: rlwimi
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; X32: stwbrx 3, 4, 5
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; X32: lwbrx 3, 3, 4
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; X32: sthbrx 3, 4, 5
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; X32: lhbrx 3, 3, 4
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; X64-NOT: rlwinm
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; X64-NOT: rlwimi
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=x86 | grep -A 2 {call.*f} | grep movl
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; RUN: llc < %s -march=x86 | FileCheck %s
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; Check the register copy comes after the call to f and before the call to g
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; PR3784
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@ -26,3 +26,7 @@ lpad: ; preds = %cont, %entry
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%y = phi i32 [ %a, %entry ], [ %aa, %cont ] ; <i32> [#uses=1]
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ret i32 %y
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}
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; CHECK: call{{.*}}f
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; CHECK-NEXT: Llabel1:
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; CHECK-NEXT: movl %eax, %esi
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel
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; RUN: llc < %s -march=x86 -asm-verbose | FileCheck %s
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; Check that register copies in the landing pad come after the EH_LABEL
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declare i32 @f()
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@ -19,3 +19,6 @@ lpad: ; preds = %cont, %entry
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%v = phi i32 [ %x, %entry ], [ %a, %cont ] ; <i32> [#uses=1]
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ret i32 %v
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}
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; CHECK: lpad
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; CHECK-NEXT: Llabel
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@ -1,6 +1,4 @@
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; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \
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; RUN: grep {fadd\\|fsub\\|fdiv\\|fmul} | not grep -i ST
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; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s
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; Test that the load of the constant is folded into the operation.
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@ -8,11 +6,14 @@ define double @foo_add(double %P) {
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%tmp.1 = fadd double %P, 1.230000e+02 ; <double> [#uses=1]
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ret double %tmp.1
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}
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; CHECK: fadd {{[^sS][^tT]}}
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; CHECK: fadd {{[^sS][^tT]}}
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define double @foo_mul(double %P) {
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%tmp.1 = fmul double %P, 1.230000e+02 ; <double> [#uses=1]
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ret double %tmp.1
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}
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; CHECK: fmul {{[^sS][^tT]}}
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define double @foo_sub(double %P) {
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%tmp.1 = fsub double %P, 1.230000e+02 ; <double> [#uses=1]
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@ -33,3 +34,9 @@ define double @foo_divr(double %P) {
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%tmp.1 = fdiv double 1.230000e+02, %P ; <double> [#uses=1]
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ret double %tmp.1
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}
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; CHECK: fsub {{[^sS][^tT]}}
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; CHECK: fdiv {{[^sS][^tT]}}
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; CHECK: fdiv {{[^sS][^tT]}}
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@ -1,4 +1,4 @@
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; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | grep -A 1 call | grep -A 1 tailcaller | grep subl | grep 12
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; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | FileCheck %s
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; Linux has 8 byte alignment so the params cause stack size 20 when tailcallopt
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; is enabled, ensure that a normal fastcc call has matching stack size
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@ -19,6 +19,5 @@ define i32 @main(i32 %argc, i8** %argv) {
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ret i32 0
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}
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; CHECK: call tailcaller
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; CHECK-NEXT: subl $12
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@ -1,13 +1,13 @@
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; An integer truncation to i1 should be done with an and instruction to make
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; sure only the LSBit survives. Test that this is the case both for a returned
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; value and as the operand of a branch.
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; RUN: llc < %s -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \
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; RUN: count 5
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; RUN: llc < %s -march=x86 | FileCheck %s
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define i1 @test1(i32 %X) zeroext {
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%Y = trunc i32 %X to i1
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ret i1 %Y
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}
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; CHECK: andl $1, %eax
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define i1 @test2(i32 %val, i32 %mask) {
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entry:
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@ -20,6 +20,7 @@ ret_true:
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ret_false:
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ret i1 false
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}
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; CHECK: testb $1, %al
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define i32 @test3(i8* %ptr) {
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%val = load i8* %ptr
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@ -30,6 +31,7 @@ cond_true:
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cond_false:
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ret i32 42
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}
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; CHECK: testb $1, %al
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define i32 @test4(i8* %ptr) {
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%tmp = ptrtoint i8* %ptr to i1
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@ -39,6 +41,7 @@ cond_true:
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cond_false:
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ret i32 42
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}
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; CHECK: testb $1, %al
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define i32 @test6(double %d) {
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%tmp = fptosi double %d to i1
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@ -48,4 +51,4 @@ cond_true:
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cond_false:
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ret i32 42
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}
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; CHECK: testb $1, %al
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