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[mips] [IAS] Add support for LAReg with identical source and destination register operands.
Summary: In this case, we're supposed to load the immediate in AT and then ADDu it with the source register and put it in the destination register. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9367 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240278 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1774,6 +1774,16 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg,
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MCInst tmpInst;
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unsigned TmpReg = DstReg;
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if (UseSrcReg && (DstReg == SrcReg)) {
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// At this point we need AT to perform the expansions and we exit if it is
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// not available.
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unsigned ATReg = getATReg(IDLoc);
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if (!ATReg)
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return true;
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TmpReg = ATReg;
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}
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tmpInst.setLoc(IDLoc);
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// FIXME: gas has a special case for values that are 000...1111, which
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// becomes a li -1 and then a dsrl
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@ -1810,23 +1820,23 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg,
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// For DLI, expand to an ORi instead of a LUi to avoid sign-extending the
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// upper 32 bits.
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tmpInst.setOpcode(Mips::ORi);
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tmpInst.addOperand(MCOperand::createReg(DstReg));
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tmpInst.addOperand(MCOperand::createReg(TmpReg));
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tmpInst.addOperand(MCOperand::createReg(Mips::ZERO));
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tmpInst.addOperand(MCOperand::createImm(Bits31To16));
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tmpInst.setLoc(IDLoc);
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Instructions.push_back(tmpInst);
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// Move the value to the upper 16 bits by doing a 16-bit left shift.
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createLShiftOri<16>(0, DstReg, IDLoc, Instructions);
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createLShiftOri<16>(0, TmpReg, IDLoc, Instructions);
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} else {
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tmpInst.setOpcode(Mips::LUi);
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tmpInst.addOperand(MCOperand::createReg(DstReg));
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tmpInst.addOperand(MCOperand::createReg(TmpReg));
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tmpInst.addOperand(MCOperand::createImm(Bits31To16));
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Instructions.push_back(tmpInst);
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}
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createLShiftOri<0>(Bits15To0, DstReg, IDLoc, Instructions);
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createLShiftOri<0>(Bits15To0, TmpReg, IDLoc, Instructions);
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if (UseSrcReg)
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createAddu(DstReg, DstReg, SrcReg, Instructions);
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createAddu(DstReg, TmpReg, SrcReg, Instructions);
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} else if ((ImmValue & (0xffffLL << 48)) == 0) {
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if (Is32BitImm) {
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@ -1853,14 +1863,14 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg,
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uint16_t Bits15To0 = ImmValue & 0xffff;
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tmpInst.setOpcode(Mips::LUi);
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tmpInst.addOperand(MCOperand::createReg(DstReg));
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tmpInst.addOperand(MCOperand::createReg(TmpReg));
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tmpInst.addOperand(MCOperand::createImm(Bits47To32));
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Instructions.push_back(tmpInst);
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createLShiftOri<0>(Bits31To16, DstReg, IDLoc, Instructions);
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createLShiftOri<16>(Bits15To0, DstReg, IDLoc, Instructions);
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createLShiftOri<0>(Bits31To16, TmpReg, IDLoc, Instructions);
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createLShiftOri<16>(Bits15To0, TmpReg, IDLoc, Instructions);
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if (UseSrcReg)
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createAddu(DstReg, DstReg, SrcReg, Instructions);
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createAddu(DstReg, TmpReg, SrcReg, Instructions);
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} else {
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if (Is32BitImm) {
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@ -1889,22 +1899,22 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg,
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uint16_t Bits15To0 = ImmValue & 0xffff;
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tmpInst.setOpcode(Mips::LUi);
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tmpInst.addOperand(MCOperand::createReg(DstReg));
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tmpInst.addOperand(MCOperand::createReg(TmpReg));
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tmpInst.addOperand(MCOperand::createImm(Bits63To48));
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Instructions.push_back(tmpInst);
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createLShiftOri<0>(Bits47To32, DstReg, IDLoc, Instructions);
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createLShiftOri<0>(Bits47To32, TmpReg, IDLoc, Instructions);
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// When Bits31To16 is 0, do a left shift of 32 bits instead of doing
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// two left shifts of 16 bits.
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if (Bits31To16 == 0) {
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createLShiftOri<32>(Bits15To0, DstReg, IDLoc, Instructions);
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createLShiftOri<32>(Bits15To0, TmpReg, IDLoc, Instructions);
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} else {
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createLShiftOri<16>(Bits31To16, DstReg, IDLoc, Instructions);
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createLShiftOri<16>(Bits15To0, DstReg, IDLoc, Instructions);
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createLShiftOri<16>(Bits31To16, TmpReg, IDLoc, Instructions);
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createLShiftOri<16>(Bits15To0, TmpReg, IDLoc, Instructions);
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}
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if (UseSrcReg)
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createAddu(DstReg, DstReg, SrcReg, Instructions);
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createAddu(DstReg, TmpReg, SrcReg, Instructions);
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}
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return false;
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}
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@ -54,6 +54,12 @@
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# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16
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# CHECK: ori $1, $1, %lo(symbol) # encoding: [A,A,0x21,0x34]
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# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16
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# CHECK: addu $8, $1, $8 # encoding: [0x21,0x40,0x28,0x00]
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la $8, 20($8)
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# CHECK: ori $8, $8, 20 # encoding: [0x14,0x00,0x08,0x35]
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la $8, 65538($8)
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# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
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# CHECK: ori $1, $1, 2 # encoding: [0x02,0x00,0x21,0x34]
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# CHECK: addu $8, $1, $8 # encoding: [0x21,0x40,0x28,0x00]
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# LW/SW and LDC1/SDC1 of symbol address, done by MipsAsmParser::expandMemInst():
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