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Make this test not dependent upon the triple. All that was needed

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was some flexibility in the check line for the comment basic block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230400 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2015-02-24 23:43:26 +00:00
parent aa94c06fa5
commit 8269a59b1c
1 changed files with 9 additions and 9 deletions
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18
test/CodeGen/X86/mmx-fold-load.ll
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@ -1,8 +1,8 @@
; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck %s
; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
define i64 @t0(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t0:
; CHECK: ## BB#0: ## %entry
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psllq (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@ -19,7 +19,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32)
define i64 @t1(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t1:
; CHECK: ## BB#0: ## %entry
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrlq (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@ -36,7 +36,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx, i32)
define i64 @t2(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t2:
; CHECK: ## BB#0: ## %entry
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psllw (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@ -53,7 +53,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.w(x86_mmx, i32)
define i64 @t3(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t3:
; CHECK: ## BB#0: ## %entry
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrlw (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@ -70,7 +70,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32)
define i64 @t4(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t4:
; CHECK: ## BB#0: ## %entry
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: pslld (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@ -87,7 +87,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.d(x86_mmx, i32)
define i64 @t5(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t5:
; CHECK: ## BB#0: ## %entry
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrld (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@ -104,7 +104,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.d(x86_mmx, i32)
define i64 @t6(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t6:
; CHECK: ## BB#0: ## %entry
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psraw (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@ -121,7 +121,7 @@ declare x86_mmx @llvm.x86.mmx.psrai.w(x86_mmx, i32)
define i64 @t7(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t7:
; CHECK: ## BB#0: ## %entry
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrad (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax