mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-10 02:29:32 +00:00
Whitespace and 80-column fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124323 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
c47fd9fbf5
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@ -90,9 +90,8 @@ static cl::opt<std::string>
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MatchPrefix("match-prefix", cl::init(""),
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MatchPrefix("match-prefix", cl::init(""),
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cl::desc("Only match instructions with the given prefix"));
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cl::desc("Only match instructions with the given prefix"));
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namespace {
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namespace {
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class AsmMatcherInfo;
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class AsmMatcherInfo;
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struct SubtargetFeatureInfo;
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struct SubtargetFeatureInfo;
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/// ClassInfo - Helper class for storing the information about a particular
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/// ClassInfo - Helper class for storing the information about a particular
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@ -247,7 +246,7 @@ struct MatchableInfo {
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struct AsmOperand {
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struct AsmOperand {
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/// Token - This is the token that the operand came from.
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/// Token - This is the token that the operand came from.
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StringRef Token;
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StringRef Token;
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/// The unique class instance this operand should match.
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/// The unique class instance this operand should match.
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ClassInfo *Class;
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ClassInfo *Class;
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@ -256,10 +255,10 @@ struct MatchableInfo {
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/// The suboperand index within SrcOpName, or -1 for the entire operand.
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/// The suboperand index within SrcOpName, or -1 for the entire operand.
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int SubOpIdx;
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int SubOpIdx;
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explicit AsmOperand(StringRef T) : Token(T), Class(0), SubOpIdx(-1) {}
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explicit AsmOperand(StringRef T) : Token(T), Class(0), SubOpIdx(-1) {}
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};
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};
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/// ResOperand - This represents a single operand in the result instruction
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/// ResOperand - This represents a single operand in the result instruction
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/// generated by the match. In cases (like addressing modes) where a single
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/// generated by the match. In cases (like addressing modes) where a single
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/// assembler operand expands to multiple MCOperands, this represents the
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/// assembler operand expands to multiple MCOperands, this represents the
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@ -270,39 +269,39 @@ struct MatchableInfo {
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/// generated by calling the render method on the assembly operand. The
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/// generated by calling the render method on the assembly operand. The
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/// corresponding AsmOperand is specified by AsmOperandNum.
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/// corresponding AsmOperand is specified by AsmOperandNum.
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RenderAsmOperand,
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RenderAsmOperand,
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/// TiedOperand - This represents a result operand that is a duplicate of
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/// TiedOperand - This represents a result operand that is a duplicate of
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/// a previous result operand.
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/// a previous result operand.
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TiedOperand,
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TiedOperand,
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/// ImmOperand - This represents an immediate value that is dumped into
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/// ImmOperand - This represents an immediate value that is dumped into
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/// the operand.
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/// the operand.
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ImmOperand,
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ImmOperand,
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/// RegOperand - This represents a fixed register that is dumped in.
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/// RegOperand - This represents a fixed register that is dumped in.
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RegOperand
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RegOperand
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} Kind;
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} Kind;
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union {
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union {
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/// This is the operand # in the AsmOperands list that this should be
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/// This is the operand # in the AsmOperands list that this should be
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/// copied from.
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/// copied from.
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unsigned AsmOperandNum;
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unsigned AsmOperandNum;
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/// TiedOperandNum - This is the (earlier) result operand that should be
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/// TiedOperandNum - This is the (earlier) result operand that should be
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/// copied from.
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/// copied from.
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unsigned TiedOperandNum;
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unsigned TiedOperandNum;
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/// ImmVal - This is the immediate value added to the instruction.
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/// ImmVal - This is the immediate value added to the instruction.
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int64_t ImmVal;
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int64_t ImmVal;
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/// Register - This is the register record.
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/// Register - This is the register record.
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Record *Register;
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Record *Register;
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};
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};
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/// MINumOperands - The number of MCInst operands populated by this
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/// MINumOperands - The number of MCInst operands populated by this
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/// operand.
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/// operand.
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unsigned MINumOperands;
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unsigned MINumOperands;
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static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) {
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static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) {
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ResOperand X;
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ResOperand X;
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X.Kind = RenderAsmOperand;
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X.Kind = RenderAsmOperand;
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@ -310,7 +309,7 @@ struct MatchableInfo {
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X.MINumOperands = NumOperands;
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X.MINumOperands = NumOperands;
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return X;
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return X;
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}
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}
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static ResOperand getTiedOp(unsigned TiedOperandNum) {
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static ResOperand getTiedOp(unsigned TiedOperandNum) {
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ResOperand X;
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ResOperand X;
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X.Kind = TiedOperand;
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X.Kind = TiedOperand;
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@ -318,7 +317,7 @@ struct MatchableInfo {
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X.MINumOperands = 1;
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X.MINumOperands = 1;
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return X;
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return X;
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}
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}
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static ResOperand getImmOp(int64_t Val) {
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static ResOperand getImmOp(int64_t Val) {
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ResOperand X;
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ResOperand X;
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X.Kind = ImmOperand;
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X.Kind = ImmOperand;
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@ -326,7 +325,7 @@ struct MatchableInfo {
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X.MINumOperands = 1;
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X.MINumOperands = 1;
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return X;
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return X;
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}
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}
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static ResOperand getRegOp(Record *Reg) {
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static ResOperand getRegOp(Record *Reg) {
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ResOperand X;
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ResOperand X;
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X.Kind = RegOperand;
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X.Kind = RegOperand;
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@ -339,16 +338,16 @@ struct MatchableInfo {
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/// TheDef - This is the definition of the instruction or InstAlias that this
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/// TheDef - This is the definition of the instruction or InstAlias that this
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/// matchable came from.
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/// matchable came from.
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Record *const TheDef;
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Record *const TheDef;
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/// DefRec - This is the definition that it came from.
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/// DefRec - This is the definition that it came from.
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PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec;
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PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec;
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const CodeGenInstruction *getResultInst() const {
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const CodeGenInstruction *getResultInst() const {
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if (DefRec.is<const CodeGenInstruction*>())
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if (DefRec.is<const CodeGenInstruction*>())
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return DefRec.get<const CodeGenInstruction*>();
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return DefRec.get<const CodeGenInstruction*>();
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return DefRec.get<const CodeGenInstAlias*>()->ResultInst;
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return DefRec.get<const CodeGenInstAlias*>()->ResultInst;
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}
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}
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/// ResOperands - This is the operand list that should be built for the result
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/// ResOperands - This is the operand list that should be built for the result
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/// MCInst.
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/// MCInst.
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std::vector<ResOperand> ResOperands;
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std::vector<ResOperand> ResOperands;
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@ -360,7 +359,7 @@ struct MatchableInfo {
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/// Mnemonic - This is the first token of the matched instruction, its
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/// Mnemonic - This is the first token of the matched instruction, its
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/// mnemonic.
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/// mnemonic.
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StringRef Mnemonic;
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StringRef Mnemonic;
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/// AsmOperands - The textual operands that this instruction matches,
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/// AsmOperands - The textual operands that this instruction matches,
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/// annotated with a class and where in the OperandList they were defined.
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/// annotated with a class and where in the OperandList they were defined.
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/// This directly corresponds to the tokenized AsmString after the mnemonic is
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/// This directly corresponds to the tokenized AsmString after the mnemonic is
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@ -374,7 +373,7 @@ struct MatchableInfo {
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/// ConvertToMCInst to convert parsed operands into an MCInst for this
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/// ConvertToMCInst to convert parsed operands into an MCInst for this
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/// function.
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/// function.
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std::string ConversionFnKind;
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std::string ConversionFnKind;
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MatchableInfo(const CodeGenInstruction &CGI)
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MatchableInfo(const CodeGenInstruction &CGI)
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: TheDef(CGI.TheDef), DefRec(&CGI), AsmString(CGI.AsmString) {
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: TheDef(CGI.TheDef), DefRec(&CGI), AsmString(CGI.AsmString) {
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}
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}
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@ -382,18 +381,18 @@ struct MatchableInfo {
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MatchableInfo(const CodeGenInstAlias *Alias)
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MatchableInfo(const CodeGenInstAlias *Alias)
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: TheDef(Alias->TheDef), DefRec(Alias), AsmString(Alias->AsmString) {
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: TheDef(Alias->TheDef), DefRec(Alias), AsmString(Alias->AsmString) {
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}
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}
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void Initialize(const AsmMatcherInfo &Info,
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void Initialize(const AsmMatcherInfo &Info,
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SmallPtrSet<Record*, 16> &SingletonRegisters);
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SmallPtrSet<Record*, 16> &SingletonRegisters);
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/// Validate - Return true if this matchable is a valid thing to match against
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/// Validate - Return true if this matchable is a valid thing to match against
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/// and perform a bunch of validity checking.
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/// and perform a bunch of validity checking.
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bool Validate(StringRef CommentDelimiter, bool Hack) const;
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bool Validate(StringRef CommentDelimiter, bool Hack) const;
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/// getSingletonRegisterForAsmOperand - If the specified token is a singleton
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/// getSingletonRegisterForAsmOperand - If the specified token is a singleton
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/// register, return the Record for it, otherwise return null.
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/// register, return the Record for it, otherwise return null.
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Record *getSingletonRegisterForAsmOperand(unsigned i,
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Record *getSingletonRegisterForAsmOperand(unsigned i,
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const AsmMatcherInfo &Info) const;
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const AsmMatcherInfo &Info) const;
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/// FindAsmOperand - Find the AsmOperand with the specified name and
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/// FindAsmOperand - Find the AsmOperand with the specified name and
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/// suboperand index.
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/// suboperand index.
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@ -404,7 +403,7 @@ struct MatchableInfo {
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return i;
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return i;
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return -1;
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return -1;
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}
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}
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/// FindAsmOperandNamed - Find the first AsmOperand with the specified name.
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/// FindAsmOperandNamed - Find the first AsmOperand with the specified name.
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/// This does not check the suboperand index.
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/// This does not check the suboperand index.
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int FindAsmOperandNamed(StringRef N) const {
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int FindAsmOperandNamed(StringRef N) const {
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@ -413,7 +412,7 @@ struct MatchableInfo {
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return i;
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return i;
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return -1;
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return -1;
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}
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}
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void BuildInstructionResultOperands();
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void BuildInstructionResultOperands();
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void BuildAliasResultOperands();
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void BuildAliasResultOperands();
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@ -445,7 +444,7 @@ struct MatchableInfo {
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// The primary comparator is the instruction mnemonic.
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// The primary comparator is the instruction mnemonic.
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if (Mnemonic != RHS.Mnemonic)
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if (Mnemonic != RHS.Mnemonic)
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return false;
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return false;
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// The number of operands is unambiguous.
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// The number of operands is unambiguous.
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if (AsmOperands.size() != RHS.AsmOperands.size())
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if (AsmOperands.size() != RHS.AsmOperands.size())
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return false;
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return false;
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@ -478,7 +477,7 @@ struct MatchableInfo {
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}
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}
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void dump();
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void dump();
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private:
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private:
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void TokenizeAsmString(const AsmMatcherInfo &Info);
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void TokenizeAsmString(const AsmMatcherInfo &Info);
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};
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};
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@ -493,7 +492,7 @@ struct SubtargetFeatureInfo {
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unsigned Index;
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unsigned Index;
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SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {}
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SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {}
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/// \brief The name of the enumerated constant identifying this feature.
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/// \brief The name of the enumerated constant identifying this feature.
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std::string getEnumName() const {
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std::string getEnumName() const {
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return "Feature_" + TheDef->getName();
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return "Feature_" + TheDef->getName();
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@ -525,7 +524,7 @@ public:
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/// Map of Predicate records to their subtarget information.
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/// Map of Predicate records to their subtarget information.
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std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures;
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std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures;
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private:
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private:
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/// Map of token to class information which has already been constructed.
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/// Map of token to class information which has already been constructed.
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std::map<std::string, ClassInfo*> TokenClasses;
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std::map<std::string, ClassInfo*> TokenClasses;
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@ -556,15 +555,15 @@ private:
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unsigned AsmOpIdx);
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unsigned AsmOpIdx);
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void BuildAliasOperandReference(MatchableInfo *II, StringRef OpName,
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void BuildAliasOperandReference(MatchableInfo *II, StringRef OpName,
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MatchableInfo::AsmOperand &Op);
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MatchableInfo::AsmOperand &Op);
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public:
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public:
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AsmMatcherInfo(Record *AsmParser,
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AsmMatcherInfo(Record *AsmParser,
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CodeGenTarget &Target,
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CodeGenTarget &Target,
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RecordKeeper &Records);
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RecordKeeper &Records);
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/// BuildInfo - Construct the various tables used during matching.
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/// BuildInfo - Construct the various tables used during matching.
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void BuildInfo();
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void BuildInfo();
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/// getSubtargetFeature - Lookup or create the subtarget feature info for the
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/// getSubtargetFeature - Lookup or create the subtarget feature info for the
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/// given operand.
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/// given operand.
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SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
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SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
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@ -595,16 +594,16 @@ void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
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SmallPtrSet<Record*, 16> &SingletonRegisters) {
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SmallPtrSet<Record*, 16> &SingletonRegisters) {
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// TODO: Eventually support asmparser for Variant != 0.
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// TODO: Eventually support asmparser for Variant != 0.
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AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
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AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
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TokenizeAsmString(Info);
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TokenizeAsmString(Info);
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// Compute the require features.
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// Compute the require features.
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std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
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std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
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for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
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for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
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if (SubtargetFeatureInfo *Feature =
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if (SubtargetFeatureInfo *Feature =
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Info.getSubtargetFeature(Predicates[i]))
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Info.getSubtargetFeature(Predicates[i]))
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RequiredFeatures.push_back(Feature);
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RequiredFeatures.push_back(Feature);
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// Collect singleton registers, if used.
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// Collect singleton registers, if used.
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for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
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for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
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if (Record *Reg = getSingletonRegisterForAsmOperand(i, Info))
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if (Record *Reg = getSingletonRegisterForAsmOperand(i, Info))
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@ -651,7 +650,7 @@ void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
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AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
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AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
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InTok = false;
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InTok = false;
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}
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}
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// If this isn't "${", treat like a normal token.
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// If this isn't "${", treat like a normal token.
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if (i + 1 == String.size() || String[i + 1] != '{') {
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if (i + 1 == String.size() || String[i + 1] != '{') {
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Prev = i;
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Prev = i;
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@ -680,7 +679,7 @@ void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
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}
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}
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if (InTok && Prev != String.size())
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if (InTok && Prev != String.size())
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AsmOperands.push_back(AsmOperand(String.substr(Prev)));
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AsmOperands.push_back(AsmOperand(String.substr(Prev)));
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// The first token of the instruction is the mnemonic, which must be a
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// The first token of the instruction is the mnemonic, which must be a
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// simple string, not a $foo variable or a singleton register.
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// simple string, not a $foo variable or a singleton register.
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assert(!AsmOperands.empty() && "Instruction has no tokens?");
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assert(!AsmOperands.empty() && "Instruction has no tokens?");
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@ -688,25 +687,23 @@ void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
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if (Mnemonic[0] == '$' || getSingletonRegisterForAsmOperand(0, Info))
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if (Mnemonic[0] == '$' || getSingletonRegisterForAsmOperand(0, Info))
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throw TGError(TheDef->getLoc(),
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throw TGError(TheDef->getLoc(),
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"Invalid instruction mnemonic '" + Mnemonic.str() + "'!");
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"Invalid instruction mnemonic '" + Mnemonic.str() + "'!");
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// Remove the first operand, it is tracked in the mnemonic field.
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// Remove the first operand, it is tracked in the mnemonic field.
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AsmOperands.erase(AsmOperands.begin());
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AsmOperands.erase(AsmOperands.begin());
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}
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}
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bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
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bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
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// Reject matchables with no .s string.
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// Reject matchables with no .s string.
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if (AsmString.empty())
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if (AsmString.empty())
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throw TGError(TheDef->getLoc(), "instruction with empty asm string");
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throw TGError(TheDef->getLoc(), "instruction with empty asm string");
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// Reject any matchables with a newline in them, they should be marked
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// Reject any matchables with a newline in them, they should be marked
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// isCodeGenOnly if they are pseudo instructions.
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// isCodeGenOnly if they are pseudo instructions.
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if (AsmString.find('\n') != std::string::npos)
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if (AsmString.find('\n') != std::string::npos)
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throw TGError(TheDef->getLoc(),
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throw TGError(TheDef->getLoc(),
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"multiline instruction is not valid for the asmparser, "
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"multiline instruction is not valid for the asmparser, "
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||||||
"mark it isCodeGenOnly");
|
"mark it isCodeGenOnly");
|
||||||
|
|
||||||
// Remove comments from the asm string. We know that the asmstring only
|
// Remove comments from the asm string. We know that the asmstring only
|
||||||
// has one line.
|
// has one line.
|
||||||
if (!CommentDelimiter.empty() &&
|
if (!CommentDelimiter.empty() &&
|
||||||
@ -714,7 +711,7 @@ bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
|
|||||||
throw TGError(TheDef->getLoc(),
|
throw TGError(TheDef->getLoc(),
|
||||||
"asmstring for instruction has comment character in it, "
|
"asmstring for instruction has comment character in it, "
|
||||||
"mark it isCodeGenOnly");
|
"mark it isCodeGenOnly");
|
||||||
|
|
||||||
// Reject matchables with operand modifiers, these aren't something we can
|
// Reject matchables with operand modifiers, these aren't something we can
|
||||||
// handle, the target should be refactored to use operands instead of
|
// handle, the target should be refactored to use operands instead of
|
||||||
// modifiers.
|
// modifiers.
|
||||||
@ -728,7 +725,7 @@ bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
|
|||||||
throw TGError(TheDef->getLoc(),
|
throw TGError(TheDef->getLoc(),
|
||||||
"matchable with operand modifier '" + Tok.str() +
|
"matchable with operand modifier '" + Tok.str() +
|
||||||
"' not supported by asm matcher. Mark isCodeGenOnly!");
|
"' not supported by asm matcher. Mark isCodeGenOnly!");
|
||||||
|
|
||||||
// Verify that any operand is only mentioned once.
|
// Verify that any operand is only mentioned once.
|
||||||
// We reject aliases and ignore instructions for now.
|
// We reject aliases and ignore instructions for now.
|
||||||
if (Tok[0] == '$' && !OperandNames.insert(Tok).second) {
|
if (Tok[0] == '$' && !OperandNames.insert(Tok).second) {
|
||||||
@ -746,11 +743,10 @@ bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
|
|||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/// getSingletonRegisterForAsmOperand - If the specified token is a singleton
|
/// getSingletonRegisterForAsmOperand - If the specified token is a singleton
|
||||||
/// register, return the register name, otherwise return a null StringRef.
|
/// register, return the register name, otherwise return a null StringRef.
|
||||||
Record *MatchableInfo::
|
Record *MatchableInfo::
|
||||||
@ -758,16 +754,16 @@ getSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info) const{
|
|||||||
StringRef Tok = AsmOperands[i].Token;
|
StringRef Tok = AsmOperands[i].Token;
|
||||||
if (!Tok.startswith(Info.RegisterPrefix))
|
if (!Tok.startswith(Info.RegisterPrefix))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
StringRef RegName = Tok.substr(Info.RegisterPrefix.size());
|
StringRef RegName = Tok.substr(Info.RegisterPrefix.size());
|
||||||
if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName))
|
if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName))
|
||||||
return Reg->TheDef;
|
return Reg->TheDef;
|
||||||
|
|
||||||
// If there is no register prefix (i.e. "%" in "%eax"), then this may
|
// If there is no register prefix (i.e. "%" in "%eax"), then this may
|
||||||
// be some random non-register token, just ignore it.
|
// be some random non-register token, just ignore it.
|
||||||
if (Info.RegisterPrefix.empty())
|
if (Info.RegisterPrefix.empty())
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
// Otherwise, we have something invalid prefixed with the register prefix,
|
// Otherwise, we have something invalid prefixed with the register prefix,
|
||||||
// such as %foo.
|
// such as %foo.
|
||||||
std::string Err = "unable to find register for '" + RegName.str() +
|
std::string Err = "unable to find register for '" + RegName.str() +
|
||||||
@ -775,7 +771,6 @@ getSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info) const{
|
|||||||
throw TGError(TheDef->getLoc(), Err);
|
throw TGError(TheDef->getLoc(), Err);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static std::string getEnumNameForToken(StringRef Str) {
|
static std::string getEnumNameForToken(StringRef Str) {
|
||||||
std::string Res;
|
std::string Res;
|
||||||
|
|
||||||
@ -876,7 +871,7 @@ BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
|
|||||||
ContainingSet = *it;
|
ContainingSet = *it;
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
std::set<Record*> Tmp;
|
std::set<Record*> Tmp;
|
||||||
std::swap(Tmp, ContainingSet);
|
std::swap(Tmp, ContainingSet);
|
||||||
std::insert_iterator< std::set<Record*> > II(ContainingSet,
|
std::insert_iterator< std::set<Record*> > II(ContainingSet,
|
||||||
@ -1013,14 +1008,13 @@ void AsmMatcherInfo::BuildOperandClasses() {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
AsmMatcherInfo::AsmMatcherInfo(Record *asmParser,
|
AsmMatcherInfo::AsmMatcherInfo(Record *asmParser,
|
||||||
CodeGenTarget &target,
|
CodeGenTarget &target,
|
||||||
RecordKeeper &records)
|
RecordKeeper &records)
|
||||||
: Records(records), AsmParser(asmParser), Target(target),
|
: Records(records), AsmParser(asmParser), Target(target),
|
||||||
RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) {
|
RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) {
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void AsmMatcherInfo::BuildInfo() {
|
void AsmMatcherInfo::BuildInfo() {
|
||||||
// Build information about all of the AssemblerPredicates.
|
// Build information about all of the AssemblerPredicates.
|
||||||
std::vector<Record*> AllPredicates =
|
std::vector<Record*> AllPredicates =
|
||||||
@ -1030,17 +1024,17 @@ void AsmMatcherInfo::BuildInfo() {
|
|||||||
// Ignore predicates that are not intended for the assembler.
|
// Ignore predicates that are not intended for the assembler.
|
||||||
if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
|
if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
if (Pred->getName().empty())
|
if (Pred->getName().empty())
|
||||||
throw TGError(Pred->getLoc(), "Predicate has no name!");
|
throw TGError(Pred->getLoc(), "Predicate has no name!");
|
||||||
|
|
||||||
unsigned FeatureNo = SubtargetFeatures.size();
|
unsigned FeatureNo = SubtargetFeatures.size();
|
||||||
SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo);
|
SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo);
|
||||||
assert(FeatureNo < 32 && "Too many subtarget features!");
|
assert(FeatureNo < 32 && "Too many subtarget features!");
|
||||||
}
|
}
|
||||||
|
|
||||||
StringRef CommentDelimiter = AsmParser->getValueAsString("CommentDelimiter");
|
StringRef CommentDelimiter = AsmParser->getValueAsString("CommentDelimiter");
|
||||||
|
|
||||||
// Parse the instructions; we need to do this first so that we can gather the
|
// Parse the instructions; we need to do this first so that we can gather the
|
||||||
// singleton register classes.
|
// singleton register classes.
|
||||||
SmallPtrSet<Record*, 16> SingletonRegisters;
|
SmallPtrSet<Record*, 16> SingletonRegisters;
|
||||||
@ -1056,15 +1050,15 @@ void AsmMatcherInfo::BuildInfo() {
|
|||||||
// Ignore "codegen only" instructions.
|
// Ignore "codegen only" instructions.
|
||||||
if (CGI.TheDef->getValueAsBit("isCodeGenOnly"))
|
if (CGI.TheDef->getValueAsBit("isCodeGenOnly"))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
// Validate the operand list to ensure we can handle this instruction.
|
// Validate the operand list to ensure we can handle this instruction.
|
||||||
for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) {
|
for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) {
|
||||||
const CGIOperandList::OperandInfo &OI = CGI.Operands[i];
|
const CGIOperandList::OperandInfo &OI = CGI.Operands[i];
|
||||||
|
|
||||||
// Validate tied operands.
|
// Validate tied operands.
|
||||||
if (OI.getTiedRegister() != -1) {
|
if (OI.getTiedRegister() != -1) {
|
||||||
// If we have a tied operand that consists of multiple MCOperands, reject
|
// If we have a tied operand that consists of multiple MCOperands,
|
||||||
// it. We reject aliases and ignore instructions for now.
|
// reject it. We reject aliases and ignore instructions for now.
|
||||||
if (OI.MINumOperands != 1) {
|
if (OI.MINumOperands != 1) {
|
||||||
// FIXME: Should reject these. The ARM backend hits this with $lane
|
// FIXME: Should reject these. The ARM backend hits this with $lane
|
||||||
// in a bunch of instructions. It is unclear what the right answer is.
|
// in a bunch of instructions. It is unclear what the right answer is.
|
||||||
@ -1077,26 +1071,26 @@ void AsmMatcherInfo::BuildInfo() {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
OwningPtr<MatchableInfo> II(new MatchableInfo(CGI));
|
OwningPtr<MatchableInfo> II(new MatchableInfo(CGI));
|
||||||
|
|
||||||
II->Initialize(*this, SingletonRegisters);
|
II->Initialize(*this, SingletonRegisters);
|
||||||
|
|
||||||
// Ignore instructions which shouldn't be matched and diagnose invalid
|
// Ignore instructions which shouldn't be matched and diagnose invalid
|
||||||
// instruction definitions with an error.
|
// instruction definitions with an error.
|
||||||
if (!II->Validate(CommentDelimiter, true))
|
if (!II->Validate(CommentDelimiter, true))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
// Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
|
// Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
|
||||||
//
|
//
|
||||||
// FIXME: This is a total hack.
|
// FIXME: This is a total hack.
|
||||||
if (StringRef(II->TheDef->getName()).startswith("Int_") ||
|
if (StringRef(II->TheDef->getName()).startswith("Int_") ||
|
||||||
StringRef(II->TheDef->getName()).endswith("_Int"))
|
StringRef(II->TheDef->getName()).endswith("_Int"))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
Matchables.push_back(II.take());
|
Matchables.push_back(II.take());
|
||||||
}
|
}
|
||||||
|
|
||||||
// Parse all of the InstAlias definitions and stick them in the list of
|
// Parse all of the InstAlias definitions and stick them in the list of
|
||||||
// matchables.
|
// matchables.
|
||||||
std::vector<Record*> AllInstAliases =
|
std::vector<Record*> AllInstAliases =
|
||||||
@ -1112,12 +1106,12 @@ void AsmMatcherInfo::BuildInfo() {
|
|||||||
continue;
|
continue;
|
||||||
|
|
||||||
OwningPtr<MatchableInfo> II(new MatchableInfo(Alias));
|
OwningPtr<MatchableInfo> II(new MatchableInfo(Alias));
|
||||||
|
|
||||||
II->Initialize(*this, SingletonRegisters);
|
II->Initialize(*this, SingletonRegisters);
|
||||||
|
|
||||||
// Validate the alias definitions.
|
// Validate the alias definitions.
|
||||||
II->Validate(CommentDelimiter, false);
|
II->Validate(CommentDelimiter, false);
|
||||||
|
|
||||||
Matchables.push_back(II.take());
|
Matchables.push_back(II.take());
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1158,20 +1152,20 @@ void AsmMatcherInfo::BuildInfo() {
|
|||||||
Op.Class = getTokenClass(Token);
|
Op.Class = getTokenClass(Token);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Otherwise this is an operand reference.
|
// Otherwise this is an operand reference.
|
||||||
StringRef OperandName;
|
StringRef OperandName;
|
||||||
if (Token[1] == '{')
|
if (Token[1] == '{')
|
||||||
OperandName = Token.substr(2, Token.size() - 3);
|
OperandName = Token.substr(2, Token.size() - 3);
|
||||||
else
|
else
|
||||||
OperandName = Token.substr(1);
|
OperandName = Token.substr(1);
|
||||||
|
|
||||||
if (II->DefRec.is<const CodeGenInstruction*>())
|
if (II->DefRec.is<const CodeGenInstruction*>())
|
||||||
BuildInstructionOperandReference(II, OperandName, i);
|
BuildInstructionOperandReference(II, OperandName, i);
|
||||||
else
|
else
|
||||||
BuildAliasOperandReference(II, OperandName, Op);
|
BuildAliasOperandReference(II, OperandName, Op);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (II->DefRec.is<const CodeGenInstruction*>())
|
if (II->DefRec.is<const CodeGenInstruction*>())
|
||||||
II->BuildInstructionResultOperands();
|
II->BuildInstructionResultOperands();
|
||||||
else
|
else
|
||||||
@ -1191,7 +1185,7 @@ BuildInstructionOperandReference(MatchableInfo *II,
|
|||||||
const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
|
const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
|
||||||
const CGIOperandList &Operands = CGI.Operands;
|
const CGIOperandList &Operands = CGI.Operands;
|
||||||
MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx];
|
MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx];
|
||||||
|
|
||||||
// Map this token to an operand.
|
// Map this token to an operand.
|
||||||
unsigned Idx;
|
unsigned Idx;
|
||||||
if (!Operands.hasOperandNamed(OperandName, Idx))
|
if (!Operands.hasOperandNamed(OperandName, Idx))
|
||||||
@ -1238,7 +1232,7 @@ BuildInstructionOperandReference(MatchableInfo *II,
|
|||||||
OperandName = Operands[Idx.first].Name;
|
OperandName = Operands[Idx.first].Name;
|
||||||
Op->SubOpIdx = Idx.second;
|
Op->SubOpIdx = Idx.second;
|
||||||
}
|
}
|
||||||
|
|
||||||
Op->SrcOpName = OperandName;
|
Op->SrcOpName = OperandName;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1249,7 +1243,7 @@ void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
|
|||||||
StringRef OperandName,
|
StringRef OperandName,
|
||||||
MatchableInfo::AsmOperand &Op) {
|
MatchableInfo::AsmOperand &Op) {
|
||||||
const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
|
const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
|
||||||
|
|
||||||
// Set up the operand class.
|
// Set up the operand class.
|
||||||
for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i)
|
for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i)
|
||||||
if (CGA.ResultOperands[i].isRecord() &&
|
if (CGA.ResultOperands[i].isRecord() &&
|
||||||
@ -1270,7 +1264,7 @@ void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
|
|||||||
|
|
||||||
void MatchableInfo::BuildInstructionResultOperands() {
|
void MatchableInfo::BuildInstructionResultOperands() {
|
||||||
const CodeGenInstruction *ResultInst = getResultInst();
|
const CodeGenInstruction *ResultInst = getResultInst();
|
||||||
|
|
||||||
// Loop over all operands of the result instruction, determining how to
|
// Loop over all operands of the result instruction, determining how to
|
||||||
// populate them.
|
// populate them.
|
||||||
for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
|
for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
|
||||||
@ -1282,7 +1276,7 @@ void MatchableInfo::BuildInstructionResultOperands() {
|
|||||||
ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
|
ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Find out what operand from the asmparser this MCInst operand comes from.
|
// Find out what operand from the asmparser this MCInst operand comes from.
|
||||||
int SrcOperand = FindAsmOperandNamed(OpInfo.Name);
|
int SrcOperand = FindAsmOperandNamed(OpInfo.Name);
|
||||||
if (OpInfo.Name.empty() || SrcOperand == -1)
|
if (OpInfo.Name.empty() || SrcOperand == -1)
|
||||||
@ -1310,14 +1304,14 @@ void MatchableInfo::BuildInstructionResultOperands() {
|
|||||||
void MatchableInfo::BuildAliasResultOperands() {
|
void MatchableInfo::BuildAliasResultOperands() {
|
||||||
const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>();
|
const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>();
|
||||||
const CodeGenInstruction *ResultInst = getResultInst();
|
const CodeGenInstruction *ResultInst = getResultInst();
|
||||||
|
|
||||||
// Loop over all operands of the result instruction, determining how to
|
// Loop over all operands of the result instruction, determining how to
|
||||||
// populate them.
|
// populate them.
|
||||||
unsigned AliasOpNo = 0;
|
unsigned AliasOpNo = 0;
|
||||||
unsigned LastOpNo = CGA.ResultInstOperandIndex.size();
|
unsigned LastOpNo = CGA.ResultInstOperandIndex.size();
|
||||||
for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
|
for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
|
||||||
const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i];
|
const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i];
|
||||||
|
|
||||||
// If this is a tied operand, just copy from the previously handled operand.
|
// If this is a tied operand, just copy from the previously handled operand.
|
||||||
int TiedOp = OpInfo->getTiedRegister();
|
int TiedOp = OpInfo->getTiedRegister();
|
||||||
if (TiedOp != -1) {
|
if (TiedOp != -1) {
|
||||||
@ -1398,7 +1392,7 @@ static void EmitConvertToMCInst(CodeGenTarget &Target,
|
|||||||
std::string Signature = "Convert";
|
std::string Signature = "Convert";
|
||||||
std::string CaseBody;
|
std::string CaseBody;
|
||||||
raw_string_ostream CaseOS(CaseBody);
|
raw_string_ostream CaseOS(CaseBody);
|
||||||
|
|
||||||
// Compute the convert enum and the case body.
|
// Compute the convert enum and the case body.
|
||||||
for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) {
|
for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) {
|
||||||
const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i];
|
const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i];
|
||||||
@ -1408,7 +1402,7 @@ static void EmitConvertToMCInst(CodeGenTarget &Target,
|
|||||||
case MatchableInfo::ResOperand::RenderAsmOperand: {
|
case MatchableInfo::ResOperand::RenderAsmOperand: {
|
||||||
// This comes from something we parsed.
|
// This comes from something we parsed.
|
||||||
MatchableInfo::AsmOperand &Op = II.AsmOperands[OpInfo.AsmOperandNum];
|
MatchableInfo::AsmOperand &Op = II.AsmOperands[OpInfo.AsmOperandNum];
|
||||||
|
|
||||||
// Registers are always converted the same, don't duplicate the
|
// Registers are always converted the same, don't duplicate the
|
||||||
// conversion function based on them.
|
// conversion function based on them.
|
||||||
Signature += "__";
|
Signature += "__";
|
||||||
@ -1418,13 +1412,13 @@ static void EmitConvertToMCInst(CodeGenTarget &Target,
|
|||||||
Signature += Op.Class->ClassName;
|
Signature += Op.Class->ClassName;
|
||||||
Signature += utostr(OpInfo.MINumOperands);
|
Signature += utostr(OpInfo.MINumOperands);
|
||||||
Signature += "_" + itostr(OpInfo.AsmOperandNum);
|
Signature += "_" + itostr(OpInfo.AsmOperandNum);
|
||||||
|
|
||||||
CaseOS << " ((" << TargetOperandClass << "*)Operands["
|
CaseOS << " ((" << TargetOperandClass << "*)Operands["
|
||||||
<< (OpInfo.AsmOperandNum+1) << "])->" << Op.Class->RenderMethod
|
<< (OpInfo.AsmOperandNum+1) << "])->" << Op.Class->RenderMethod
|
||||||
<< "(Inst, " << OpInfo.MINumOperands << ");\n";
|
<< "(Inst, " << OpInfo.MINumOperands << ");\n";
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
case MatchableInfo::ResOperand::TiedOperand: {
|
case MatchableInfo::ResOperand::TiedOperand: {
|
||||||
// If this operand is tied to a previous one, just copy the MCInst
|
// If this operand is tied to a previous one, just copy the MCInst
|
||||||
// operand from the earlier one.We can only tie single MCOperand values.
|
// operand from the earlier one.We can only tie single MCOperand values.
|
||||||
@ -1450,10 +1444,10 @@ static void EmitConvertToMCInst(CodeGenTarget &Target,
|
|||||||
CaseOS << " Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
|
CaseOS << " Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
|
||||||
Signature += "__reg" + OpInfo.Register->getName();
|
Signature += "__reg" + OpInfo.Register->getName();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
II.ConversionFnKind = Signature;
|
II.ConversionFnKind = Signature;
|
||||||
|
|
||||||
// Check if we have already generated this signature.
|
// Check if we have already generated this signature.
|
||||||
@ -1538,9 +1532,9 @@ static void EmitClassifyOperand(AsmMatcherInfo &Info,
|
|||||||
OS << " }\n\n";
|
OS << " }\n\n";
|
||||||
|
|
||||||
// Classify user defined operands. To do so, we need to perform a topological
|
// Classify user defined operands. To do so, we need to perform a topological
|
||||||
// sort of the superclass relationship graph so that we always match the
|
// sort of the superclass relationship graph so that we always match the
|
||||||
// narrowest type first.
|
// narrowest type first.
|
||||||
|
|
||||||
// Collect the incoming edge counts for each class.
|
// Collect the incoming edge counts for each class.
|
||||||
std::map<ClassInfo*, unsigned> IncomingEdges;
|
std::map<ClassInfo*, unsigned> IncomingEdges;
|
||||||
for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
|
for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
|
||||||
@ -1549,12 +1543,12 @@ static void EmitClassifyOperand(AsmMatcherInfo &Info,
|
|||||||
|
|
||||||
if (!CI.isUserClass())
|
if (!CI.isUserClass())
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
for (std::vector<ClassInfo*>::iterator SI = CI.SuperClasses.begin(),
|
for (std::vector<ClassInfo*>::iterator SI = CI.SuperClasses.begin(),
|
||||||
SE = CI.SuperClasses.end(); SI != SE; ++SI)
|
SE = CI.SuperClasses.end(); SI != SE; ++SI)
|
||||||
++IncomingEdges[*SI];
|
++IncomingEdges[*SI];
|
||||||
}
|
}
|
||||||
|
|
||||||
// Initialize a worklist of classes with no incoming edges.
|
// Initialize a worklist of classes with no incoming edges.
|
||||||
std::vector<ClassInfo*> LeafClasses;
|
std::vector<ClassInfo*> LeafClasses;
|
||||||
for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
|
for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
|
||||||
@ -1562,17 +1556,17 @@ static void EmitClassifyOperand(AsmMatcherInfo &Info,
|
|||||||
if (!IncomingEdges[*it])
|
if (!IncomingEdges[*it])
|
||||||
LeafClasses.push_back(*it);
|
LeafClasses.push_back(*it);
|
||||||
}
|
}
|
||||||
|
|
||||||
// Iteratively pop the list, process that class, and update the incoming
|
// Iteratively pop the list, process that class, and update the incoming
|
||||||
// edge counts for its super classes. When a superclass reaches zero
|
// edge counts for its super classes. When a superclass reaches zero
|
||||||
// incoming edges, push it onto the worklist for processing.
|
// incoming edges, push it onto the worklist for processing.
|
||||||
while (!LeafClasses.empty()) {
|
while (!LeafClasses.empty()) {
|
||||||
ClassInfo &CI = *LeafClasses.back();
|
ClassInfo &CI = *LeafClasses.back();
|
||||||
LeafClasses.pop_back();
|
LeafClasses.pop_back();
|
||||||
|
|
||||||
if (!CI.isUserClass())
|
if (!CI.isUserClass())
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
OS << " // '" << CI.ClassName << "' class";
|
OS << " // '" << CI.ClassName << "' class";
|
||||||
if (!CI.SuperClasses.empty()) {
|
if (!CI.SuperClasses.empty()) {
|
||||||
OS << ", subclass of ";
|
OS << ", subclass of ";
|
||||||
@ -1580,7 +1574,7 @@ static void EmitClassifyOperand(AsmMatcherInfo &Info,
|
|||||||
if (i) OS << ", ";
|
if (i) OS << ", ";
|
||||||
OS << "'" << CI.SuperClasses[i]->ClassName << "'";
|
OS << "'" << CI.SuperClasses[i]->ClassName << "'";
|
||||||
assert(CI < *CI.SuperClasses[i] && "Invalid class relation!");
|
assert(CI < *CI.SuperClasses[i] && "Invalid class relation!");
|
||||||
|
|
||||||
--IncomingEdges[CI.SuperClasses[i]];
|
--IncomingEdges[CI.SuperClasses[i]];
|
||||||
if (!IncomingEdges[CI.SuperClasses[i]])
|
if (!IncomingEdges[CI.SuperClasses[i]])
|
||||||
LeafClasses.push_back(CI.SuperClasses[i]);
|
LeafClasses.push_back(CI.SuperClasses[i]);
|
||||||
@ -1596,11 +1590,11 @@ static void EmitClassifyOperand(AsmMatcherInfo &Info,
|
|||||||
OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod
|
OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod
|
||||||
<< "() && \"Invalid class relationship!\");\n";
|
<< "() && \"Invalid class relationship!\");\n";
|
||||||
}
|
}
|
||||||
|
|
||||||
OS << " return " << CI.Name << ";\n";
|
OS << " return " << CI.Name << ";\n";
|
||||||
OS << " }\n\n";
|
OS << " }\n\n";
|
||||||
}
|
}
|
||||||
|
|
||||||
OS << " return InvalidMatchClass;\n";
|
OS << " return InvalidMatchClass;\n";
|
||||||
OS << "}\n\n";
|
OS << "}\n\n";
|
||||||
}
|
}
|
||||||
@ -1652,8 +1646,6 @@ static void EmitIsSubclass(CodeGenTarget &Target,
|
|||||||
OS << "}\n\n";
|
OS << "}\n\n";
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/// EmitMatchTokenString - Emit the function to match a token string to the
|
/// EmitMatchTokenString - Emit the function to match a token string to the
|
||||||
/// appropriate match class value.
|
/// appropriate match class value.
|
||||||
static void EmitMatchTokenString(CodeGenTarget &Target,
|
static void EmitMatchTokenString(CodeGenTarget &Target,
|
||||||
@ -1749,18 +1741,18 @@ static std::string GetAliasRequiredFeatures(Record *R,
|
|||||||
unsigned NumFeatures = 0;
|
unsigned NumFeatures = 0;
|
||||||
for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
|
for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
|
||||||
SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
|
SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
|
||||||
|
|
||||||
if (F == 0)
|
if (F == 0)
|
||||||
throw TGError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
|
throw TGError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
|
||||||
"' is not marked as an AssemblerPredicate!");
|
"' is not marked as an AssemblerPredicate!");
|
||||||
|
|
||||||
if (NumFeatures)
|
if (NumFeatures)
|
||||||
Result += '|';
|
Result += '|';
|
||||||
|
|
||||||
Result += F->getEnumName();
|
Result += F->getEnumName();
|
||||||
++NumFeatures;
|
++NumFeatures;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (NumFeatures > 1)
|
if (NumFeatures > 1)
|
||||||
Result = '(' + Result + ')';
|
Result = '(' + Result + ')';
|
||||||
return Result;
|
return Result;
|
||||||
@ -1779,11 +1771,11 @@ static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
|
|||||||
|
|
||||||
OS << "static void ApplyMnemonicAliases(StringRef &Mnemonic, "
|
OS << "static void ApplyMnemonicAliases(StringRef &Mnemonic, "
|
||||||
"unsigned Features) {\n";
|
"unsigned Features) {\n";
|
||||||
|
|
||||||
// Keep track of all the aliases from a mnemonic. Use an std::map so that the
|
// Keep track of all the aliases from a mnemonic. Use an std::map so that the
|
||||||
// iteration order of the map is stable.
|
// iteration order of the map is stable.
|
||||||
std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
|
std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
|
||||||
|
|
||||||
for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
|
for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
|
||||||
Record *R = Aliases[i];
|
Record *R = Aliases[i];
|
||||||
AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
|
AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
|
||||||
@ -1802,11 +1794,11 @@ static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
|
|||||||
// emit it last.
|
// emit it last.
|
||||||
std::string MatchCode;
|
std::string MatchCode;
|
||||||
int AliasWithNoPredicate = -1;
|
int AliasWithNoPredicate = -1;
|
||||||
|
|
||||||
for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
|
for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
|
||||||
Record *R = ToVec[i];
|
Record *R = ToVec[i];
|
||||||
std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
|
std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
|
||||||
|
|
||||||
// If this unconditionally matches, remember it for later and diagnose
|
// If this unconditionally matches, remember it for later and diagnose
|
||||||
// duplicates.
|
// duplicates.
|
||||||
if (FeatureMask.empty()) {
|
if (FeatureMask.empty()) {
|
||||||
@ -1816,33 +1808,32 @@ static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
|
|||||||
"two MnemonicAliases with the same 'from' mnemonic!");
|
"two MnemonicAliases with the same 'from' mnemonic!");
|
||||||
throw TGError(R->getLoc(), "this is the other MnemonicAlias.");
|
throw TGError(R->getLoc(), "this is the other MnemonicAlias.");
|
||||||
}
|
}
|
||||||
|
|
||||||
AliasWithNoPredicate = i;
|
AliasWithNoPredicate = i;
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!MatchCode.empty())
|
if (!MatchCode.empty())
|
||||||
MatchCode += "else ";
|
MatchCode += "else ";
|
||||||
MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n";
|
MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n";
|
||||||
MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n";
|
MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n";
|
||||||
}
|
}
|
||||||
|
|
||||||
if (AliasWithNoPredicate != -1) {
|
if (AliasWithNoPredicate != -1) {
|
||||||
Record *R = ToVec[AliasWithNoPredicate];
|
Record *R = ToVec[AliasWithNoPredicate];
|
||||||
if (!MatchCode.empty())
|
if (!MatchCode.empty())
|
||||||
MatchCode += "else\n ";
|
MatchCode += "else\n ";
|
||||||
MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n";
|
MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n";
|
||||||
}
|
}
|
||||||
|
|
||||||
MatchCode += "return;";
|
MatchCode += "return;";
|
||||||
|
|
||||||
Cases.push_back(std::make_pair(I->first, MatchCode));
|
Cases.push_back(std::make_pair(I->first, MatchCode));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
StringMatcher("Mnemonic", Cases, OS).Emit();
|
StringMatcher("Mnemonic", Cases, OS).Emit();
|
||||||
OS << "}\n\n";
|
OS << "}\n\n";
|
||||||
|
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1928,7 +1919,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
|||||||
|
|
||||||
// Generate the function that remaps for mnemonic aliases.
|
// Generate the function that remaps for mnemonic aliases.
|
||||||
bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info);
|
bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info);
|
||||||
|
|
||||||
// Generate the unified function to convert operands into an MCInst.
|
// Generate the unified function to convert operands into an MCInst.
|
||||||
EmitConvertToMCInst(Target, Info.Matchables, OS);
|
EmitConvertToMCInst(Target, Info.Matchables, OS);
|
||||||
|
|
||||||
@ -1954,7 +1945,6 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
|||||||
it != ie; ++it)
|
it != ie; ++it)
|
||||||
MaxNumOperands = std::max(MaxNumOperands, (*it)->AsmOperands.size());
|
MaxNumOperands = std::max(MaxNumOperands, (*it)->AsmOperands.size());
|
||||||
|
|
||||||
|
|
||||||
// Emit the static match table; unused classes get initalized to 0 which is
|
// Emit the static match table; unused classes get initalized to 0 which is
|
||||||
// guaranteed to be InvalidMatchClass.
|
// guaranteed to be InvalidMatchClass.
|
||||||
//
|
//
|
||||||
@ -2042,7 +2032,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
|||||||
OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
|
OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
|
||||||
OS << " ApplyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n";
|
OS << " ApplyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n";
|
||||||
}
|
}
|
||||||
|
|
||||||
// Emit code to compute the class list for this operand vector.
|
// Emit code to compute the class list for this operand vector.
|
||||||
OS << " // Eliminate obvious mismatches.\n";
|
OS << " // Eliminate obvious mismatches.\n";
|
||||||
OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
|
OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
|
||||||
|
Loading…
Reference in New Issue
Block a user