From 828bfc7350b2055624d42961a1a037144fab7955 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 31 Mar 2014 18:21:18 +0000 Subject: [PATCH] R600: Add BFE, BFI, and BFM intrinsics to help with writing tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205236 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/AMDGPUISelLowering.cpp | 24 ++++++++++++++ lib/Target/R600/AMDGPUIntrinsics.td | 5 ++- lib/Target/R600/EvergreenInstructions.td | 5 +++ test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll | 40 +++++++++++++++++++++++ test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll | 40 +++++++++++++++++++++++ test/CodeGen/R600/llvm.AMDGPU.bfi.ll | 41 ++++++++++++++++++++++++ test/CodeGen/R600/llvm.AMDGPU.bfm.ll | 40 +++++++++++++++++++++++ 7 files changed, 194 insertions(+), 1 deletion(-) create mode 100644 test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll create mode 100644 test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll create mode 100644 test/CodeGen/R600/llvm.AMDGPU.bfi.ll create mode 100644 test/CodeGen/R600/llvm.AMDGPU.bfm.ll diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp index 2fbf6257241..54ef2c403f2 100644 --- a/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/lib/Target/R600/AMDGPUISelLowering.cpp @@ -559,6 +559,30 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, case AMDGPUIntrinsic::AMDGPU_umin: return DAG.getNode(AMDGPUISD::UMIN, DL, VT, Op.getOperand(1), Op.getOperand(2)); + + case AMDGPUIntrinsic::AMDGPU_bfe_i32: + return DAG.getNode(AMDGPUISD::BFE_I32, DL, VT, + Op.getOperand(1), + Op.getOperand(2), + Op.getOperand(3)); + + case AMDGPUIntrinsic::AMDGPU_bfe_u32: + return DAG.getNode(AMDGPUISD::BFE_U32, DL, VT, + Op.getOperand(1), + Op.getOperand(2), + Op.getOperand(3)); + + case AMDGPUIntrinsic::AMDGPU_bfi: + return DAG.getNode(AMDGPUISD::BFI, DL, VT, + Op.getOperand(1), + Op.getOperand(2), + Op.getOperand(3)); + + case AMDGPUIntrinsic::AMDGPU_bfm: + return DAG.getNode(AMDGPUISD::BFM, DL, VT, + Op.getOperand(1), + Op.getOperand(2)); + case AMDGPUIntrinsic::AMDIL_round_nearest: return DAG.getNode(ISD::FRINT, DL, VT, Op.getOperand(1)); } diff --git a/lib/Target/R600/AMDGPUIntrinsics.td b/lib/Target/R600/AMDGPUIntrinsics.td index 9f975bf9bf4..c6521d07cfb 100644 --- a/lib/Target/R600/AMDGPUIntrinsics.td +++ b/lib/Target/R600/AMDGPUIntrinsics.td @@ -50,7 +50,10 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in { def int_AMDGPU_umax : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; def int_AMDGPU_umin : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; def int_AMDGPU_cube : Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>; - + def int_AMDGPU_bfi : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; + def int_AMDGPU_bfe_i32 : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; + def int_AMDGPU_bfe_u32 : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; + def int_AMDGPU_bfm : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; def int_AMDGPU_barrier_local : Intrinsic<[], [], []>; } diff --git a/lib/Target/R600/EvergreenInstructions.td b/lib/Target/R600/EvergreenInstructions.td index 93151b4b51e..6430ca6e11f 100644 --- a/lib/Target/R600/EvergreenInstructions.td +++ b/lib/Target/R600/EvergreenInstructions.td @@ -288,6 +288,11 @@ def BFI_INT_eg : R600_3OP <0x06, "BFI_INT", defm : BFIPatterns ; +def BFM_INT_eg : R600_2OP <0xA0, "BFM_INT", + [(set i32:$dst, (AMDGPUbfm i32:$src0, i32:$src1))], + VecALU +>; + def MULADD_UINT24_eg : R600_3OP <0x10, "MULADD_UINT24", [(set i32:$dst, (add (mul U24:$src0, U24:$src1), i32:$src2))], VecALU >; diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll b/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll new file mode 100644 index 00000000000..c3f000a87c6 --- /dev/null +++ b/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s + +declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone + +; FUNC-LABEL: @bfe_i32_arg_arg_arg +; SI: V_BFE_I32 +; EG: BFE_INT +define void @bfe_i32_arg_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) nounwind { + %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 %src1, i32 %src1) nounwind readnone + store i32 %bfe_i32, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfe_i32_arg_arg_imm +; SI: V_BFE_I32 +; EG: BFE_INT +define void @bfe_i32_arg_arg_imm(i32 addrspace(1)* %out, i32 %src0, i32 %src1) nounwind { + %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 %src1, i32 123) nounwind readnone + store i32 %bfe_i32, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfe_i32_arg_imm_arg +; SI: V_BFE_I32 +; EG: BFE_INT +define void @bfe_i32_arg_imm_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src2) nounwind { + %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 123, i32 %src2) nounwind readnone + store i32 %bfe_i32, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfe_i32_imm_arg_arg +; SI: V_BFE_I32 +; EG: BFE_INT +define void @bfe_i32_imm_arg_arg(i32 addrspace(1)* %out, i32 %src1, i32 %src2) nounwind { + %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 123, i32 %src1, i32 %src2) nounwind readnone + store i32 %bfe_i32, i32 addrspace(1)* %out, align 4 + ret void +} diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll b/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll new file mode 100644 index 00000000000..0d478638219 --- /dev/null +++ b/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s + +declare i32 @llvm.AMDGPU.bfe.u32(i32, i32, i32) nounwind readnone + +; FUNC-LABEL: @bfe_u32_arg_arg_arg +; SI: V_BFE_U32 +; EG: BFE_UINT +define void @bfe_u32_arg_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) nounwind { + %bfe_u32 = call i32 @llvm.AMDGPU.bfe.u32(i32 %src0, i32 %src1, i32 %src1) nounwind readnone + store i32 %bfe_u32, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfe_u32_arg_arg_imm +; SI: V_BFE_U32 +; EG: BFE_UINT +define void @bfe_u32_arg_arg_imm(i32 addrspace(1)* %out, i32 %src0, i32 %src1) nounwind { + %bfe_u32 = call i32 @llvm.AMDGPU.bfe.u32(i32 %src0, i32 %src1, i32 123) nounwind readnone + store i32 %bfe_u32, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfe_u32_arg_imm_arg +; SI: V_BFE_U32 +; EG: BFE_UINT +define void @bfe_u32_arg_imm_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src2) nounwind { + %bfe_u32 = call i32 @llvm.AMDGPU.bfe.u32(i32 %src0, i32 123, i32 %src2) nounwind readnone + store i32 %bfe_u32, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfe_u32_imm_arg_arg +; SI: V_BFE_U32 +; EG: BFE_UINT +define void @bfe_u32_imm_arg_arg(i32 addrspace(1)* %out, i32 %src1, i32 %src2) nounwind { + %bfe_u32 = call i32 @llvm.AMDGPU.bfe.u32(i32 123, i32 %src1, i32 %src2) nounwind readnone + store i32 %bfe_u32, i32 addrspace(1)* %out, align 4 + ret void +} diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfi.ll b/test/CodeGen/R600/llvm.AMDGPU.bfi.ll new file mode 100644 index 00000000000..e1de45b4ba2 --- /dev/null +++ b/test/CodeGen/R600/llvm.AMDGPU.bfi.ll @@ -0,0 +1,41 @@ +; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s + +declare i32 @llvm.AMDGPU.bfi(i32, i32, i32) nounwind readnone + +; FUNC-LABEL: @bfi_arg_arg_arg +; SI: V_BFI_B32 +; EG: BFI_INT +define void @bfi_arg_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) nounwind { + %bfi = call i32 @llvm.AMDGPU.bfi(i32 %src0, i32 %src1, i32 %src1) nounwind readnone + store i32 %bfi, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfi_arg_arg_imm +; SI: V_BFI_B32 +; EG: BFI_INT +define void @bfi_arg_arg_imm(i32 addrspace(1)* %out, i32 %src0, i32 %src1) nounwind { + %bfi = call i32 @llvm.AMDGPU.bfi(i32 %src0, i32 %src1, i32 123) nounwind readnone + store i32 %bfi, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfi_arg_imm_arg +; SI: V_BFI_B32 +; EG: BFI_INT +define void @bfi_arg_imm_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src2) nounwind { + %bfi = call i32 @llvm.AMDGPU.bfi(i32 %src0, i32 123, i32 %src2) nounwind readnone + store i32 %bfi, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfi_imm_arg_arg +; SI: V_BFI_B32 +; EG: BFI_INT +define void @bfi_imm_arg_arg(i32 addrspace(1)* %out, i32 %src1, i32 %src2) nounwind { + %bfi = call i32 @llvm.AMDGPU.bfi(i32 123, i32 %src1, i32 %src2) nounwind readnone + store i32 %bfi, i32 addrspace(1)* %out, align 4 + ret void +} + diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfm.ll b/test/CodeGen/R600/llvm.AMDGPU.bfm.ll new file mode 100644 index 00000000000..ef8721e4a97 --- /dev/null +++ b/test/CodeGen/R600/llvm.AMDGPU.bfm.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s + +declare i32 @llvm.AMDGPU.bfm(i32, i32) nounwind readnone + +; FUNC-LABEL: @bfm_arg_arg +; SI: V_BFM +; EG: BFM_INT +define void @bfm_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1) nounwind { + %bfm = call i32 @llvm.AMDGPU.bfm(i32 %src0, i32 %src1) nounwind readnone + store i32 %bfm, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfm_arg_imm +; SI: V_BFM +; EG: BFM_INT +define void @bfm_arg_imm(i32 addrspace(1)* %out, i32 %src0) nounwind { + %bfm = call i32 @llvm.AMDGPU.bfm(i32 %src0, i32 123) nounwind readnone + store i32 %bfm, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfm_imm_arg +; SI: V_BFM +; EG: BFM_INT +define void @bfm_imm_arg(i32 addrspace(1)* %out, i32 %src1) nounwind { + %bfm = call i32 @llvm.AMDGPU.bfm(i32 123, i32 %src1) nounwind readnone + store i32 %bfm, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: @bfm_imm_imm +; SI: V_BFM +; EG: BFM_INT +define void @bfm_imm_imm(i32 addrspace(1)* %out) nounwind { + %bfm = call i32 @llvm.AMDGPU.bfm(i32 123, i32 456) nounwind readnone + store i32 %bfm, i32 addrspace(1)* %out, align 4 + ret void +}