6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-15 04:30:12 +00:00
Code Issues Projects Releases Wiki Activity

Fix PR 1995.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46898 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Devang Patel 2008-02-08 22:49:13 +00:00
parent f2f8c2ae07
commit 82ada54da0
2 changed files with 65 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
lib/Transforms/Scalar/LoopIndexSplit.cpp
View File

@ -1392,6 +1392,11 @@ bool LoopIndexSplit::splitLoop(SplitInfo &SD) {
if (!Succ0->getSinglePredecessor() || !Succ1->getSinglePredecessor()) if (!Succ0->getSinglePredecessor() || !Succ1->getSinglePredecessor())
return false; return false;
// If Exiting block includes loop variant instructions then this
// loop may not be split safely.
if (!safeExitingBlock(SD, ExitCondition->getParent()))
return false;
// After loop is cloned there are two loops. // After loop is cloned there are two loops.
// //
// First loop, referred as ALoop, executes first part of loop's iteration // First loop, referred as ALoop, executes first part of loop's iteration
@ -1616,8 +1621,8 @@ void LoopIndexSplit::moveExitCondition(BasicBlock *CondBB, BasicBlock *ActiveBB,
/// - ExitBB's single predecessor was Latch /// - ExitBB's single predecessor was Latch
/// - Latch's second successor was Header /// - Latch's second successor was Header
/// Now /// Now
/// - ExitBB's single predecessor was Header /// - ExitBB's single predecessor is Header
/// - Latch's one and only successor was Header /// - Latch's one and only successor is Header
/// ///
/// Update ExitBB PHINodes' to reflect this change. /// Update ExitBB PHINodes' to reflect this change.
void LoopIndexSplit::updatePHINodes(BasicBlock *ExitBB, BasicBlock *Latch, void LoopIndexSplit::updatePHINodes(BasicBlock *ExitBB, BasicBlock *Latch,
@ -1632,27 +1637,18 @@ void LoopIndexSplit::updatePHINodes(BasicBlock *ExitBB, BasicBlock *Latch,
Value *V = PN->getIncomingValueForBlock(Latch); Value *V = PN->getIncomingValueForBlock(Latch);
if (PHINode *PHV = dyn_cast<PHINode>(V)) { if (PHINode *PHV = dyn_cast<PHINode>(V)) {
// PHV is in Latch. PHV has two uses, one use is in ExitBB PHINode // PHV is in Latch. PHV has one use is in ExitBB PHINode. And one use
// (i.e. PN :)). // in Header which is new incoming value for PN.
// The second use is in Header and it is new incoming value for PN.
PHINode *U1 = NULL;
PHINode *U2 = NULL;
Value *NewV = NULL; Value *NewV = NULL;
for (Value::use_iterator UI = PHV->use_begin(), E = PHV->use_end(); for (Value::use_iterator UI = PHV->use_begin(), E = PHV->use_end();
UI != E; ++UI) { UI != E; ++UI)
if (!U1) if (PHINode *U = dyn_cast<PHINode>(*UI))
U1 = cast<PHINode>(*UI); if (U->getParent() == Header) {
else if (!U2) NewV = U;
U2 = cast<PHINode>(*UI); break;
else }
assert ( 0 && "Unexpected third use of this PHINode");
}
assert (U1 && U2 && "Unable to find two uses");
if (U1->getParent() == Header) assert (NewV && "Unable to find new incoming value for exit block PHI");
NewV = U1;
else
NewV = U2;
PN->addIncoming(NewV, Header); PN->addIncoming(NewV, Header);
} else if (Instruction *PHI = dyn_cast<Instruction>(V)) { } else if (Instruction *PHI = dyn_cast<Instruction>(V)) {

48
test/Transforms/LoopIndexSplit/2008-02-08-Crash.ll Normal file
View File

@ -0,0 +1,48 @@
; RUN: llvm-as < %s | opt -loop-index-split -disable-output
; PR 1995
define void @add_blkdev_randomness(i32 %major) nounwind {
entry:
br label %bb
bb: ; preds = %bb39, %entry
%A.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %TEMP.0, %bb39 ] ; <i32> [#uses=1]
%D.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %C.0.reg2mem.0, %bb39 ] ; <i32> [#uses=3]
%C.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %tmp34, %bb39 ] ; <i32> [#uses=4]
%TEMP.1.reg2mem.0 = phi i32 [ undef, %entry ], [ %TEMP.0, %bb39 ] ; <i32> [#uses=1]
%i.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp38, %bb39 ] ; <i32> [#uses=3]
%B.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %A.0.reg2mem.0, %bb39 ] ; <i32> [#uses=5]
%tmp1 = icmp slt i32 %i.0.reg2mem.0, 40 ; <i1> [#uses=1]
br i1 %tmp1, label %bb3, label %bb12
bb3: ; preds = %bb
%tmp6 = xor i32 %C.0.reg2mem.0, %D.0.reg2mem.0 ; <i32> [#uses=1]
%tmp8 = and i32 %B.0.reg2mem.0, %tmp6 ; <i32> [#uses=1]
%tmp10 = xor i32 %tmp8, %D.0.reg2mem.0 ; <i32> [#uses=1]
%tmp11 = add i32 %tmp10, 1518500249 ; <i32> [#uses=1]
br label %bb39
bb12: ; preds = %bb
%tmp14 = icmp slt i32 %i.0.reg2mem.0, 60 ; <i1> [#uses=1]
br i1 %tmp14, label %bb17, label %bb39
bb17: ; preds = %bb12
%tmp20 = and i32 %B.0.reg2mem.0, %C.0.reg2mem.0 ; <i32> [#uses=1]
%tmp23 = xor i32 %B.0.reg2mem.0, %C.0.reg2mem.0 ; <i32> [#uses=1]
%tmp25 = and i32 %tmp23, %D.0.reg2mem.0 ; <i32> [#uses=1]
%tmp26 = add i32 %tmp20, -1894007588 ; <i32> [#uses=1]
%tmp27 = add i32 %tmp26, %tmp25 ; <i32> [#uses=1]
br label %bb39
bb39: ; preds = %bb12, %bb3, %bb17
%TEMP.0 = phi i32 [ %tmp27, %bb17 ], [ %tmp11, %bb3 ], [ %TEMP.1.reg2mem.0, %bb12 ] ; <i32> [#uses=2]
%tmp31 = lshr i32 %B.0.reg2mem.0, 2 ; <i32> [#uses=1]
%tmp33 = shl i32 %B.0.reg2mem.0, 30 ; <i32> [#uses=1]
%tmp34 = or i32 %tmp31, %tmp33 ; <i32> [#uses=1]
%tmp38 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
%tmp41 = icmp slt i32 %tmp38, 80 ; <i1> [#uses=1]
br i1 %tmp41, label %bb, label %return
return: ; preds = %bb39
ret void
}