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Implement a small optimization, which papers over the problem in
X86/2004-04-13-FPCMOV-Crash.llx A more robust fix is to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12935 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1038,7 +1038,18 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
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FalseVal = ConstantExpr::getCast(F, Type::ShortTy);
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}
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unsigned TrueReg = getReg(TrueVal, MBB, IP);
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unsigned FalseReg = getReg(FalseVal, MBB, IP);
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if (TrueReg == FalseReg) {
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static const unsigned Opcode[] = {
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X86::MOV8rr, X86::MOV16rr, X86::MOV32rr, X86::FpMOV, X86::MOV32rr
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};
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BuildMI(*MBB, IP, Opcode[SelectClass], 1, DestReg).addReg(TrueReg);
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if (SelectClass == cLong)
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BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg+1).addReg(TrueReg+1);
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return;
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}
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unsigned Opcode;
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if (SetCondInst *SCI = canFoldSetCCIntoBranchOrSelect(Cond)) {
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// We successfully folded the setcc into the select instruction.
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@ -1130,8 +1141,6 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
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}
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}
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unsigned TrueReg = getReg(TrueVal, MBB, IP);
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unsigned FalseReg = getReg(FalseVal, MBB, IP);
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unsigned RealDestReg = DestReg;
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@ -1038,7 +1038,18 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
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FalseVal = ConstantExpr::getCast(F, Type::ShortTy);
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}
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unsigned TrueReg = getReg(TrueVal, MBB, IP);
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unsigned FalseReg = getReg(FalseVal, MBB, IP);
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if (TrueReg == FalseReg) {
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static const unsigned Opcode[] = {
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X86::MOV8rr, X86::MOV16rr, X86::MOV32rr, X86::FpMOV, X86::MOV32rr
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};
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BuildMI(*MBB, IP, Opcode[SelectClass], 1, DestReg).addReg(TrueReg);
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if (SelectClass == cLong)
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BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg+1).addReg(TrueReg+1);
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return;
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}
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unsigned Opcode;
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if (SetCondInst *SCI = canFoldSetCCIntoBranchOrSelect(Cond)) {
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// We successfully folded the setcc into the select instruction.
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@ -1130,8 +1141,6 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
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}
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}
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unsigned TrueReg = getReg(TrueVal, MBB, IP);
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unsigned FalseReg = getReg(FalseVal, MBB, IP);
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unsigned RealDestReg = DestReg;
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