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Remove caching of the target machine in NVPTXInstrInfo and

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update constructor accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211840 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2014-06-27 01:27:08 +00:00
parent 6c57c3336c
commit 82cb24a385
3 changed files with 4 additions and 5 deletions
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4
lib/Target/NVPTX/NVPTXInstrInfo.cpp
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@ -29,8 +29,8 @@ using namespace llvm;
void NVPTXInstrInfo::anchor() {}
// FIXME: Add the subtarget support on this constructor.
NVPTXInstrInfo::NVPTXInstrInfo(NVPTXTargetMachine &tm)
: NVPTXGenInstrInfo(), TM(tm), RegInfo(*TM.getSubtargetImpl()) {}
NVPTXInstrInfo::NVPTXInstrInfo(NVPTXSubtarget &STI)
: NVPTXGenInstrInfo(), RegInfo(STI) {}
void NVPTXInstrInfo::copyPhysReg(
MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL,

3
lib/Target/NVPTX/NVPTXInstrInfo.h
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@ -24,11 +24,10 @@
namespace llvm {
class NVPTXInstrInfo : public NVPTXGenInstrInfo {
NVPTXTargetMachine &TM;
const NVPTXRegisterInfo RegInfo;
virtual void anchor();
public:
explicit NVPTXInstrInfo(NVPTXTargetMachine &TM);
explicit NVPTXInstrInfo(NVPTXSubtarget &STI);
const NVPTXRegisterInfo &getRegisterInfo() const { return RegInfo; }

2
lib/Target/NVPTX/NVPTXTargetMachine.cpp
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@ -84,7 +84,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, StringRef TT,
CodeGenOpt::Level OL, bool is64bit)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, is64bit), DL(computeDataLayout(Subtarget)),
InstrInfo(*this), TLInfo(*this), TSInfo(&DL),
InstrInfo(Subtarget), TLInfo(*this), TSInfo(&DL),
FrameLowering(*this, is64bit) {
initAsmInfo();
}