6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-15 04:30:12 +00:00
Code Issues Projects Releases Wiki Activity

R600: remove manual BFE optimization

Browse Source 
Fixed since r233079

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
reviewer: arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234715 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jan Vesely 2015-04-12 23:45:01 +00:00
parent 054db7df5b
commit 8332e14bee
1 changed files with 2 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
lib/Target/R600/AMDGPUISelLowering.cpp
View File

@ -1685,14 +1685,8 @@ void AMDGPUTargetLowering::LowerUDIVREM64(SDValue Op,
const unsigned bitPos = halfBitWidth - i - 1;
SDValue POS = DAG.getConstant(bitPos, HalfVT);
// Get value of high bit
// TODO: Remove the BFE part when the optimization is fixed
SDValue HBit;
if (halfBitWidth == 32 && Subtarget->hasBFE()) {
HBit = DAG.getNode(AMDGPUISD::BFE_U32, DL, HalfVT, LHS_Lo, POS, one);
} else {
HBit = DAG.getNode(ISD::SRL, DL, HalfVT, LHS_Lo, POS);
HBit = DAG.getNode(ISD::AND, DL, HalfVT, HBit, one);
}
SDValue HBit = DAG.getNode(ISD::SRL, DL, HalfVT, LHS_Lo, POS);
HBit = DAG.getNode(ISD::AND, DL, HalfVT, HBit, one);
HBit = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, HBit);
// Shift