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[PowerPC] Add feature for Power8 vector extensions

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The current VSX feature for PowerPC specifies availability of the VSX
instructions added with the 2.06 architecture version.  With 2.07, the
architecture adds new instructions to both the Category:Vector and
Category:VSX instruction sets.  Additionally, unaligned vector storage
operations have improved performance.

This patch adds a feature to provide access to the new instructions
and performance capabilities of Power8.  For compatibility with GCC,
the feature is controlled via a new -mpower8-vector switch, and the
feature causes the __POWER8_VECTOR__ builtin define to be generated by
the preprocessor.

There is a companion patch for cfe being committed at the same time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219501 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Schmidt
2014-10-10 15:09:28 +00:00
parent 0bf4807a90
commit 836ca75dd7
3 changed files with 10 additions and 2 deletions
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5
lib/Target/PowerPC/PPCSubtarget.cpp
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@@ -94,6 +94,7 @@ void PPCSubtarget::initializeEnvironment() {
HasSPE = false;
HasQPX = false;
HasVSX = false;
HasPower8Vector = false;
HasFCPSGN = false;
HasFSQRT = false;
HasFRE = false;
@@ -155,8 +156,10 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
// FIXME: For now, we disable VSX in little-endian mode until endian
// issues in those instructions can be addressed.
if (IsLittleEndian)
if (IsLittleEndian) {
HasVSX = false;
HasPower8Vector = false;
}
// Determine default ABI.
if (TargetABI == PPC_ABI_UNKNOWN) {