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Delete test cases that generate code for allegrex/psp and cannot be repurposed.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139652 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2011-09-13 22:29:13 +00:00
parent b21abfed81
commit 8395c91d56
2 changed files with 0 additions and 45 deletions
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20
test/CodeGen/Mips/2008-07-05-ByVal.ll
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@ -1,20 +0,0 @@
; DISABLED: llc < %s -march=mips | grep {lw.*(\$4)} | count 2
; RUN: false
; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf"
%struct.byval0 = type { i32, i32 }
define i64 @test0(%struct.byval0* byval %b, i64 %sum) nounwind {
entry:
getelementptr %struct.byval0* %b, i32 0, i32 0 ; <i32*>:0 [#uses=1]
load i32* %0, align 4 ; <i32>:1 [#uses=1]
getelementptr %struct.byval0* %b, i32 0, i32 1 ; <i32*>:2 [#uses=1]
load i32* %2, align 4 ; <i32>:3 [#uses=1]
add i32 %3, %1 ; <i32>:4 [#uses=1]
sext i32 %4 to i64 ; <i64>:5 [#uses=1]
add i64 %5, %sum ; <i64>:6 [#uses=1]
ret i64 %6
}

25
test/CodeGen/Mips/2010-07-20-Select.ll
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@ -1,25 +0,0 @@
; DISABLED: llc < %s -march=mips -relocation-model=static | FileCheck %s
; DISABLED: llc < %s -march=mips -relocation-model=static -regalloc=basic | FileCheck %s
; RUN: false
+; XFAIL: *
; Fix PR7473
define i32 @main() nounwind readnone {
entry:
%a = alloca i32, align 4 ; <i32*> [#uses=2]
%c = alloca i32, align 4 ; <i32*> [#uses=2]
volatile store i32 1, i32* %a, align 4
volatile store i32 0, i32* %c, align 4
%0 = volatile load i32* %a, align 4 ; <i32> [#uses=1]
%1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
; CHECK: addiu $[[R1:[0-9]+]], $zero, 0
%iftmp.0.0 = select i1 %1, i32 3, i32 0 ; <i32> [#uses=1]
%2 = volatile load i32* %c, align 4 ; <i32> [#uses=1]
%3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
; CHECK: addiu $[[R1]], $zero, 3
; CHECK: addu $2, ${{.}}, $[[R1]]
%iftmp.2.0 = select i1 %3, i32 0, i32 5 ; <i32> [#uses=1]
%4 = add nsw i32 %iftmp.2.0, %iftmp.0.0 ; <i32> [#uses=1]
ret i32 %4
}