From 83ba99ac46a2e4189d71146246abca8c845ffd68 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Sat, 28 Feb 2004 19:43:40 +0000
Subject: [PATCH] Clean up rules

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11956 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Sparc/Makefile   | 39 ++++++++++++++-----------------------
 lib/Target/SparcV8/Makefile | 39 ++++++++++++++-----------------------
 2 files changed, 30 insertions(+), 48 deletions(-)

diff --git a/lib/Target/Sparc/Makefile b/lib/Target/Sparc/Makefile
index e2a09cfa735..78da738aa7b 100644
--- a/lib/Target/Sparc/Makefile
+++ b/lib/Target/Sparc/Makefile
@@ -10,46 +10,37 @@ LEVEL = ../../..
 LIBRARYNAME = sparcv8
 include $(LEVEL)/Makefile.common
 
+TDFILES := $(wildcard $(SourceDir)/*.td) $(SourceDir)/../Target.td
+TDFILE  := $(SourceDir)/SparcV8.td
+
 # Make sure that tblgen is run, first thing.
 $(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \
                  SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \
                  SparcV8GenInstrInfo.inc SparcV8GenInstrSelector.inc
 
-SparcV8GenRegisterNames.inc:: $(SourceDir)/SparcV8.td \
-                           $(SourceDir)/SparcV8Reg.td \
-                           $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td register names with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-register-enums -o $@
 
-SparcV8GenRegisterInfo.h.inc:: $(SourceDir)/SparcV8.td \
-                           $(SourceDir)/SparcV8Reg.td \
-                           $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenRegisterInfo.h.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td register information header with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-register-desc-header -o $@
 
-SparcV8GenRegisterInfo.inc:: $(SourceDir)/SparcV8.td \
-                         $(SourceDir)/SparcV8Reg.td \
-                         $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenRegisterInfo.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td register information implementation with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-register-desc -o $@
 
-SparcV8GenInstrNames.inc:: $(SourceDir)/SparcV8.td \
-                       $(SourceDir)/SparcV8Instrs.td \
-                       $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenInstrNames.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td instruction names with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-enums -o $@
 
-SparcV8GenInstrInfo.inc:: $(SourceDir)/SparcV8.td \
-                      $(SourceDir)/SparcV8Instrs.td \
-                      $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td instruction information with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@
 
-SparcV8GenInstrSelector.inc:: $(SourceDir)/SparcV8.td \
-                          $(SourceDir)/SparcV8Instrs.td \
-                          $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td instruction selector with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-selector -o $@
 
 clean::
 	$(VERB) rm -f *.inc
diff --git a/lib/Target/SparcV8/Makefile b/lib/Target/SparcV8/Makefile
index e2a09cfa735..78da738aa7b 100644
--- a/lib/Target/SparcV8/Makefile
+++ b/lib/Target/SparcV8/Makefile
@@ -10,46 +10,37 @@ LEVEL = ../../..
 LIBRARYNAME = sparcv8
 include $(LEVEL)/Makefile.common
 
+TDFILES := $(wildcard $(SourceDir)/*.td) $(SourceDir)/../Target.td
+TDFILE  := $(SourceDir)/SparcV8.td
+
 # Make sure that tblgen is run, first thing.
 $(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \
                  SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \
                  SparcV8GenInstrInfo.inc SparcV8GenInstrSelector.inc
 
-SparcV8GenRegisterNames.inc:: $(SourceDir)/SparcV8.td \
-                           $(SourceDir)/SparcV8Reg.td \
-                           $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td register names with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-register-enums -o $@
 
-SparcV8GenRegisterInfo.h.inc:: $(SourceDir)/SparcV8.td \
-                           $(SourceDir)/SparcV8Reg.td \
-                           $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenRegisterInfo.h.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td register information header with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-register-desc-header -o $@
 
-SparcV8GenRegisterInfo.inc:: $(SourceDir)/SparcV8.td \
-                         $(SourceDir)/SparcV8Reg.td \
-                         $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenRegisterInfo.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td register information implementation with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-register-desc -o $@
 
-SparcV8GenInstrNames.inc:: $(SourceDir)/SparcV8.td \
-                       $(SourceDir)/SparcV8Instrs.td \
-                       $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenInstrNames.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td instruction names with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-enums -o $@
 
-SparcV8GenInstrInfo.inc:: $(SourceDir)/SparcV8.td \
-                      $(SourceDir)/SparcV8Instrs.td \
-                      $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td instruction information with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@
 
-SparcV8GenInstrSelector.inc:: $(SourceDir)/SparcV8.td \
-                          $(SourceDir)/SparcV8Instrs.td \
-                          $(SourceDir)/../Target.td $(TBLGEN)
+SparcV8GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
 	@echo "Building SparcV8.td instruction selector with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
+	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-selector -o $@
 
 clean::
 	$(VERB) rm -f *.inc