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[Hexagon] Removing old XTYPE/BIT instructions and replacing usages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224381 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3048,53 +3048,25 @@ let AddedComplexity = 10 in // Complexity greater than compare reg-reg.
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def: Pat<(i1 (seteq (and (i32 IntRegs:$Rs), (i32 IntRegs:$Rt)), IntRegs:$Rt)),
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(C2_bitsset IntRegs:$Rs, IntRegs:$Rt)>;
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// clrbit.
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def CLRBIT : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2),
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"$dst = clrbit($src1, #$src2)",
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[(set (i32 IntRegs:$dst), (and (i32 IntRegs:$src1),
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(not
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(shl 1, u5ImmPred:$src2))))]>;
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def CLRBIT_31 : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2),
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"$dst = clrbit($src1, #$src2)",
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[]>;
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// Map from r0 = and(r1, 2147483647) to r0 = clrbit(r1, #31).
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def : Pat <(and (i32 IntRegs:$src1), 2147483647),
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(CLRBIT_31 (i32 IntRegs:$src1), 31)>;
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// setbit.
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def SETBIT : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2),
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"$dst = setbit($src1, #$src2)",
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[(set (i32 IntRegs:$dst), (or (i32 IntRegs:$src1),
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(shl 1, u5ImmPred:$src2)))]>;
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// Map from r0 = or(r1, -2147483648) to r0 = setbit(r1, #31).
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def SETBIT_31 : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2),
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"$dst = setbit($src1, #$src2)",
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[]>;
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def : Pat <(or (i32 IntRegs:$src1), -2147483648),
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(SETBIT_31 (i32 IntRegs:$src1), 31)>;
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// togglebit.
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def TOGBIT : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2),
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"$dst = setbit($src1, #$src2)",
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[(set (i32 IntRegs:$dst), (xor (i32 IntRegs:$src1),
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(shl 1, u5ImmPred:$src2)))]>;
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// Map from r0 = xor(r1, -2147483648) to r0 = togglebit(r1, #31).
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def TOGBIT_31 : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2),
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"$dst = togglebit($src1, #$src2)",
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[]>;
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def : Pat <(xor (i32 IntRegs:$src1), -2147483648),
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(TOGBIT_31 (i32 IntRegs:$src1), 31)>;
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//===----------------------------------------------------------------------===//
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// STYPE/BIT -
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// STYPE/COMPLEX +
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// STYPE/COMPLEX -
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// XTYPE/PERM +
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// XTYPE/PERM -
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// STYPE/PRED +
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//===----------------------------------------------------------------------===//
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@ -587,19 +587,19 @@ def : Pat <(i32 (fp_to_sint (f64 DoubleRegs:$src1))),
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Requires<[HasV5T]>;
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def : Pat <(fabs (f32 IntRegs:$src1)),
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(CLRBIT_31 (f32 IntRegs:$src1), 31)>,
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(S2_clrbit_i (f32 IntRegs:$src1), 31)>,
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Requires<[HasV5T]>;
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def : Pat <(fneg (f32 IntRegs:$src1)),
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(TOGBIT_31 (f32 IntRegs:$src1), 31)>,
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(S2_togglebit_i (f32 IntRegs:$src1), 31)>,
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Requires<[HasV5T]>;
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/*
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def : Pat <(fabs (f64 DoubleRegs:$src1)),
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(CLRBIT_31 (f32 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_hireg)), 31)>,
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(S2_clrbit_i (f32 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_hireg)), 31)>,
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Requires<[HasV5T]>;
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def : Pat <(fabs (f64 DoubleRegs:$src1)),
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(CLRBIT_31 (f32 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_hireg)), 31)>,
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(S2_clrbit_i (f32 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_hireg)), 31)>,
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Requires<[HasV5T]>;
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*/
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