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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185900 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2013-07-09 02:07:28 +00:00
parent cc64dc66e7
commit 842b1bdd94
1 changed files with 5 additions and 0 deletions
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5
lib/Target/X86/X86ISelDAGToDAG.cpp
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@@ -2531,6 +2531,11 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) {
// Prevent use of AH in a REX instruction by referencing AX instead. // Prevent use of AH in a REX instruction by referencing AX instead.
// Shift it down 8 bits. // Shift it down 8 bits.
//
// The current assumption of the register allocator is that isel
// won't generate explicit references to the GPR8_NOREX registers. If
// the allocator and/or the backend get enhanced to be more robust in
// that regard, this can be, and should be, removed.
if (HiReg == X86::AH && Subtarget->is64Bit() && if (HiReg == X86::AH && Subtarget->is64Bit() &&
!SDValue(Node, 1).use_empty()) { !SDValue(Node, 1).use_empty()) {
SDValue Result = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl, SDValue Result = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl,