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AVX-512: fixed a bug in mask operations - (i1 1) pattern
Filling k-reg with all-ones value was wrong, (i1 1) should switch on only one bit in mask register git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237536 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2156,8 +2156,8 @@ let Predicates = [HasAVX512] in {
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def : Pat<(v4i1 immAllOnesV), (COPY_TO_REGCLASS (KSET1W), VK4)>;
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def : Pat<(v4i1 immAllOnesV), (COPY_TO_REGCLASS (KSET1W), VK4)>;
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def : Pat<(v2i1 immAllOnesV), (COPY_TO_REGCLASS (KSET1W), VK2)>;
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def : Pat<(v2i1 immAllOnesV), (COPY_TO_REGCLASS (KSET1W), VK2)>;
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def : Pat<(i1 0), (COPY_TO_REGCLASS (KSET0W), VK1)>;
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def : Pat<(i1 0), (COPY_TO_REGCLASS (KSET0W), VK1)>;
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def : Pat<(i1 1), (COPY_TO_REGCLASS (KSET1W), VK1)>;
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def : Pat<(i1 1), (COPY_TO_REGCLASS (KSHIFTRWri (KSET1W), (i8 15)), VK1)>;
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def : Pat<(i1 -1), (COPY_TO_REGCLASS (KSET1W), VK1)>;
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def : Pat<(i1 -1), (COPY_TO_REGCLASS (KSHIFTRWri (KSET1W), (i8 15)), VK1)>;
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}
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}
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def : Pat<(v8i1 (extract_subvector (v16i1 VK16:$src), (iPTR 0))),
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def : Pat<(v8i1 (extract_subvector (v16i1 VK16:$src), (iPTR 0))),
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(v8i1 (COPY_TO_REGCLASS VK16:$src, VK8))>;
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(v8i1 (COPY_TO_REGCLASS VK16:$src, VK8))>;
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57
test/CodeGen/X86/avx512-mask-bugfix.ll
Executable file
57
test/CodeGen/X86/avx512-mask-bugfix.ll
Executable file
@ -0,0 +1,57 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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; ModuleID = 'foo.ll'
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) #0
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; Function Attrs: nounwind readnone
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declare i64 @llvm.cttz.i64(i64, i1) #0
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; Function Attrs: nounwind
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define void @foo(float* noalias %aFOO, float %b, i32 %a) {
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allocas:
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%full_mask_memory.i57 = alloca <8 x float>
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%return_value_memory.i60 = alloca i1
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%cmp.i = icmp eq i32 %a, 65535
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br i1 %cmp.i, label %all_on, label %some_on
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all_on:
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%mask0 = load <8 x float>, <8 x float>* %full_mask_memory.i57
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%v0.i.i.i70 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %mask0) #0
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%allon.i.i76 = icmp eq i32 %v0.i.i.i70, 65535
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br i1 %allon.i.i76, label %check_neighbors.i.i121, label %domixed.i.i100
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domixed.i.i100:
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br label %check_neighbors.i.i121
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check_neighbors.i.i121:
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%v1.i5.i.i116 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %mask0) #0
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%alleq.i.i120 = icmp eq i32 %v1.i5.i.i116, 65535
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br i1 %alleq.i.i120, label %all_equal.i.i123, label %not_all_equal.i.i124
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; CHECK: kxnorw %k0, %k0, %k0
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; CHECK: kshiftrw $15, %k0, %k0
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; CHECK: jmp
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; CHECK: kxorw %k0, %k0, %k0
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all_equal.i.i123:
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br label %reduce_equal___vyi.exit128
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not_all_equal.i.i124:
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br label %reduce_equal___vyi.exit128
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reduce_equal___vyi.exit128:
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%calltmp2.i125 = phi i1 [ true, %all_equal.i.i123 ], [ false, %not_all_equal.i.i124 ]
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store i1 %calltmp2.i125, i1* %return_value_memory.i60
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%return_value.i126 = load i1, i1* %return_value_memory.i60
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%. = select i1 %return_value.i126, i32 1, i32 0
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%select_to_float = sitofp i32 %. to float
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ret void
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some_on:
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ret void
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}
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