From 854a7db117707658625c22e546810d564f3e20ea Mon Sep 17 00:00:00 2001
From: Akira Hatanaka <ahatanak@gmail.com>
Date: Fri, 19 Aug 2011 22:59:00 +0000
Subject: [PATCH] Fix bug in function IsShiftedMask. Remove parameter
 SizeInBits, which is not needed for Mips32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138132 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Mips/MipsISelLowering.cpp | 23 +++++++++--------------
 1 file changed, 9 insertions(+), 14 deletions(-)

diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index f2682cfd249..9ddf66cb9f0 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -37,17 +37,13 @@ using namespace llvm;
 
 // If I is a shifted mask, set the size (Size) and the first bit of the 
 // mask (Pos), and return true.
-static bool IsShiftedMask(uint64_t I, unsigned SizeInBits, uint64_t &Pos,
-                          uint64_t &Size) {
-  assert(SizeInBits == 32 || SizeInBits == 64);
-  bool Is32Bits = (SizeInBits == 32);
+// For example, if I is 0x003ff800, (Pos, Size) = (11, 11).  
+static bool IsShiftedMask(uint64_t I, uint64_t &Pos, uint64_t &Size) {
+  if (!isUInt<32>(I) || !isShiftedMask_32(I))
+     return false;
 
-  if ((Is32Bits == 32 && !isShiftedMask_32(I)) ||
-      (!Is32Bits && !isShiftedMask_64(I)))
-    return false;
-
-  Size = Is32Bits ? CountPopulation_32(I) : CountPopulation_64(I);
-  Pos = Is32Bits ? CountTrailingZeros_32(I) : CountTrailingZeros_64(I);
+  Size = CountPopulation_32(I);
+  Pos = CountTrailingZeros_32(I);
   return true;
 }
 
@@ -546,7 +542,7 @@ static SDValue PerformANDCombine(SDNode *N, SelectionDAG& DAG,
   uint64_t SMPos, SMSize;
   // Op's second operand must be a shifted mask.
   if (!(CN = dyn_cast<ConstantSDNode>(Mask)) ||
-      !IsShiftedMask(CN->getZExtValue(), 32, SMPos, SMSize))
+      !IsShiftedMask(CN->getZExtValue(), SMPos, SMSize))
     return SDValue();
 
   // Return if the shifted mask does not start at bit 0 or the sum of its size
@@ -579,7 +575,7 @@ static SDValue PerformORCombine(SDNode *N, SelectionDAG& DAG,
     return SDValue();
 
   if (!(CN = dyn_cast<ConstantSDNode>(And0.getOperand(1))) ||
-      !IsShiftedMask(~CN->getZExtValue(), 32, SMPos0, SMSize0))
+      !IsShiftedMask(~CN->getSExtValue(), SMPos0, SMSize0))
     return SDValue();
 
   // See if Op's second operand matches (and (shl $src, pos), mask1).
@@ -587,8 +583,7 @@ static SDValue PerformORCombine(SDNode *N, SelectionDAG& DAG,
     return SDValue();
   
   if (!(CN = dyn_cast<ConstantSDNode>(And1.getOperand(1))) ||
-      !IsShiftedMask(CN->getZExtValue(), CN->getValueSizeInBits(0), SMPos1,
-                     SMSize1))
+      !IsShiftedMask(CN->getZExtValue(), SMPos1, SMSize1))
     return SDValue();
 
   // The shift masks must have the same position and size.