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synced 2024-10-31 09:11:13 +00:00
Regularize include guards, remove some excess whitespace and fix some comments.
Remove the extra %fsr register from SparcV9FloatCCRegClass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13069 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -11,8 +11,8 @@
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARC_REG_CLASS_INFO_H
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#define SPARC_REG_CLASS_INFO_H
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#ifndef SPARCV9REGCLASSINFO_H
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#define SPARCV9REGCLASSINFO_H
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#include "llvm/Target/TargetRegInfo.h"
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@ -81,8 +81,6 @@ struct SparcV9IntRegClass : public TargetRegClassInfo {
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};
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//-----------------------------------------------------------------------------
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// Float Register Class
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//-----------------------------------------------------------------------------
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@ -142,8 +140,6 @@ public:
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};
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//-----------------------------------------------------------------------------
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// Int CC Register Class
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// Only one integer cc register is available. However, this register is
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@ -160,8 +156,8 @@ struct SparcV9IntCCRegClass : public TargetRegClassInfo {
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void colorIGNode(IGNode *Node,
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const std::vector<bool> &IsColorUsedArr) const;
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// according to SparcV9 64 ABI, %ccr is volatile
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//
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// according to the 64-bit SparcV9 ABI, all integer CC regs are
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// volatile.
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inline bool isRegVolatile(int Reg) const { return true; }
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enum {
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@ -179,22 +175,23 @@ struct SparcV9IntCCRegClass : public TargetRegClassInfo {
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struct SparcV9FloatCCRegClass : public TargetRegClassInfo {
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SparcV9FloatCCRegClass(unsigned ID)
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: TargetRegClassInfo(ID, 4, 5) { }
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: TargetRegClassInfo(ID, 4, 4) { }
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void colorIGNode(IGNode *Node,
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const std::vector<bool> &IsColorUsedArr) const;
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// according to SparcV9 64 ABI, all %fp CC regs are volatile
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//
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// according to the 64-bit SparcV9 ABI, all floating-point CC regs are
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// volatile.
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inline bool isRegVolatile(int Reg) const { return true; }
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enum {
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fcc0, fcc1, fcc2, fcc3, fsr // fsr is not used in allocation
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}; // but has a name in getRegName()
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fcc0, fcc1, fcc2, fcc3
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};
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const char * const getRegName(unsigned reg) const;
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};
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//-----------------------------------------------------------------------------
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// SparcV9 special register class. These registers are not used for allocation
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// but are used as arguments of some instructions.
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